Gate Array

This reminded me reading (ages ago) about Altera’s HardCopy [1]: a “process that takes a working FPGA design implemented in one of Altera’s high-end FPGAs (such as Stratix II) and gives you a functionally- and footprint-equivalent ASIC at a fraction of the unit cost.”

Did a bit of Googling and realised it seems to be still alive in the form of Intel’s eASIC! [2].

[1] https://www.eejournal.com/article/20081125_hardcopy/

[2] https://www.intel.com/content/www/us/en/products/details/eas...

Like an FPGA, without the "F". (That, is unlike with an FPGA, you only program this thing once.) Must have been an inspiration for FPGAs I guesS?