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Comment by userbinator | Hacker News Reader

It's a RISC, so that's not too surprising. MIPS emulators are also roughly that size.

On the other hand, depending on the generation, PowerPC can have a whopping number of instructions.

Yes, POWER is an acronym for Power Optimization With Enhanced RISC. There are some wild instructions like cntlzd and lwarx that are more CISC-esque, and everybody’s favorite instruction (by name), eieio

There was an ISA I saw a while back that featured an "enhanced multiply and accumulate signed" instruction, which of course got the mnemonic "EMACS"

PowerPC has ‘Enforce In-Order Execution of I/O’ (eieio).

Obscure data point of the day; McDonalds is a small but long-standing real estate company in a provincial city in New Zealand. Their website address? eieio.co.nz

At what point have you enhanced your RISC architecture to the point where it becomes CISC?

Unless you're making it possible to access memory on every instruction that takes an argument, or adding more addressing modes that are redundant with ALU operations, or making registers that can only be used for one purpose, etc., it's not really turning into CISC. The acronyms are misnomers, or maybe you just need to think of what's being "reduced" as the number of micro-ops per high-level instruction. Regardless, you don't turn RISC into CISC just by adding more instructions.

Could it be that they just wanted to call it POWER. And then "Enhanced" RISC made the acronym possible?

It's true, but it's the encoding that makes this wordy or simple to emulate.

PowerPC is a trimmed down subset of the POWER architecture.

The latter has a higher number of instructions, and a POWER CPU can execute the generic PowerPC code but not vice versa (unless compiled for the common set of instructions).

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