As for Qualcomm, they won the lawsuit ARM filed against them. Changing from ARM to RISC-V would delay their ambition to take marketshare from Intel and AMD, so they are likely content to continue paying ARM royalties because they have their eyes on a much bigger prize. It also came out during the lawsuit that Qualcomm considers their in-house design team to be saving them billions of dollars in ARM royalty fees, since they only need to pay royalties for the ISA and nothing else when they use their own in-house designs.
Just because something is open source will not stop you from being stung during manufacturing, rather like how Android deployments are not free.
Patents.
If this was a winning strategy those open source implementations of SuperH cores would have been incredibly popular instead of dying in obscurity.
In any case, you should probably stop writing before you shove your foot any deeper into your mouth.
> In any case, you should probably stop writing before you shove your foot any deeper into your mouth.
Apology expected.
As for the J2, its creator does not request licensing fees, but Hitachi might require them. Unlike RISC-V, the creator of SuperH (Hitachi) is not known to have declared the ISA to be royalty free. I am not aware of such a declaration and even if there was, it is irrelevant because there is no reason to use SuperH over RISC-V. Nothing about the J2 supports the FUD you are spreading about RISC-V.
You're absolutely out of line.
> As for the J2, its creator does not request licensing fees, but Hitachi might require them.
"FUD". The whole point of the timing of the release of the J2 was it is based purely on now expired Hitachi patents, so they do not require any licensing fees.
By the way, my comment telling you that you should apologize to the community received an upvote and likely will receive more. You really are wasting people’s time with your anti-RISC-V FUD.
I too was upvoted for asking for your apology.
I will not apologize for speaking facts, and nor should you, but it is your random unnecessary insults that are unacceptable.
That's me done with this. You clearly have your opinions, but your behavior has been a discredit to the community you apparently represent.
By the way, having one’s foot in one’s mouth is an idiom meaning you said something wrong, which refers to behavior. It being obvious you are clueless is a reference to your writing, which again, refers to behavior. Saying you should apologize to people for wasting their time is similarly a reference to your behavior, and you invited that criticism by demanding an apology in broken English.
https://hc2024.hotchips.org/assets/program/conference/day2/2...
Open ISA != all implementations of it are free (although in RISC-V case, many are).
My point is that if RISC-V takes off people will struggle to do decent implementations of it without stepping on the toes of the people already in the area.
I'd go so far as to say this is the entire SiFive strategy.
So that is merely the entire semiconductor industry patent portfolio that you will have to avoid.
> Patents tend to expire at different times around the world, plus there is the possibility of submarine patents. Without a declaration from Hitachi, adopting any processor design using their ISA is likely considered a legal risk.
If you combine this with your observation that CPU patents tend to be ISA independent then surely any widespread commercial deployment of RISC-V requires an assertion from everyone else in the semi industry that they do not in fact own patents on your implementation of it or it is likely considered a legal risk.
That or you just hold some things to different standards than others.
You keep trying to spread FUD concerning RISC-V. The issue you are trying to raise is one that if valid, would prevent anyone from designing a CPU, yet many do without legal issues. Hence, the issue you raise is invalid (by modus tollens).
https://icircuit.net/benchmarking-raspberry-pi-pico-2/3983
The Hazard3 core was designed by a single person while the ARM Cortex cores were presumably designed by a team of people. The Hazard3 cores mostly outperforms the Cortex-M0+ cores in the older RP2040 and are competitive with the Cortex-M33 cores that share the RP2350 silicon. For integer addition and multiplication, they actually outperform the Cortex-M33 cores. Before you point out that they lost most of the benchmarks against the Cortex-M33 cores, let me clarify that the integer addition and multiplication performance matter far more for microcontrollers than the other tests, which is why I consider them to be competitive despite the losses. The Hazard3 cores are open source:
https://github.com/Wren6991/Hazard3
That said, not all RISC-V designs are open source, but some of the open source ones are performance competitive with higher end closed source cores, such as the SonicBoom core from Berkeley:
https://adept.eecs.berkeley.edu/wiki/_media/eop/adept-eop-je...
As for the other problem you cite, the RP2350 has both RISC-V and ARM cores. It is a certainty that if the ARM cores had not been present, the RP2350 would have been cheaper, since less die area would have been needed and ARM license fees would have been avoided.
I personally hope China get's competitive in the node size as well as I want gpu and cpus start getting cheaper every generation again as once TSMC got big lead over Intel/Samsung and Nvidia got a big lead over AMD prices have stopped coming down generation to generation for CPU's and GPU's
* Loongson is pushing a MIPS derivative forward.
* Sugon is pushing a x86 derivative (originally derived from AMD Zen) forward
* Zhaoxin is pushing a x86 derivative (derived from VIA’s chips) forward.
There is also substantial RISC-V development outside of China. Some notable ones are:
* SiFive - They are the first company to be in this space and are behind many of the early/current designs.
* Tenstorrent - This company has Jim Keller and people formerly from Apple’s chip design team and others. They have high performance designs up to 8-wide.
* Ventana - They claim to have a high performance core design that is 15-wide.
* AheadComputing - they hired Intel’s Oregon design team to design high performance RISC-V cores after the Royal Core project was cancelled last year.
* The Raspberry Pi foundation - their RP2350 contains Hazard3 RISC-V cores designed by one of their engineers.
* Nvidia - They design RISC-V cores for the microcontrollers in their GPUs, of which the GPU System Processor is the most well known. They ship billions of RISC-V cores each year as part of their GPUs. This is despite using ARM for the high end CPUs that they sell to the community.
* Western Digital - Like Nvidia, they design RISC-V cores for use in their products. They are particularly notable because they released the SweRV Core as open source.
* Meta - They are making in-house RISC-V based chips for AI training/inference.
https://www.bis.gov/media/documents/general-prohibition-10-g...
China is unlikely to move away from x86 and ARM internally even in a 10 year span. The only way that would happen is if RISC-V convinces the rest of the world to move away from those architectures in such a short span of time. ISA lock-in from legacy software is a deterrent for migration in China just as much as it is in any other country.
By the way, RISC-V is considered a foreign ISA in China, while the MIPS-derived LoongArch is considered (or at least marketed as) a domestic ISA. If the Chinese make a push to use domestic technology, RISC-V would be at a disadvantage, unless it is rebranded like MIPS was.
Right now, AFAIK only Apple is serious about designing their own ARM cores, while there are multiple competing implementations for RISC-V (which are still way behind both ARM and x86, but slooowly making their way).
VERY long-term, I expect RISC-V to become more competitive, unless whoever-owns-ARM-at-the-time adjusts strategy.
Either way, I'm glad to see competition after decades of Intel/x86 dominance.