I have a bunch of KA10 verilog that worked on a DE10-nano in the past, but it's been quite a while and i think i have a bunch of uncommitted stuff lying around as well. The verilog is based on the original schematics and I successfully ran LISP and Spacewar on it. Unfortunately simulating peripherals is always a pain, so the project currently lies dormant. But i'd like to pick it up again at some point. I just really need to rethink my approach how to do this, qsys was maybe not the greatest way to wire up the system.