Surely emulating ARM on ARM would be faster / easier to JIT? Or at least it seems that way
ADD R0, SP, PC, ROR SP
is entirely valid, even if nonsensical, instruction. But you must translate all valid inputs, else you risk breaking things. That may be a contrived example, but here is a common one: if one has a jumptable of relative offsets somewhere, pointed to by R10, even this is valid: LDR R0, [R10, R0, LSL #2]
ADD PC, R10, R0
That gets messy to translateAs I understand it, this kind of thing was a big problem for ARM in the mid-90s when they finally wrote the ARM ARM and outlawed things like ldmia r2!, {r0-r4}.