Raspberry Pi RP2350 Now Available for Purchase, Stacked Memory Variant Coming
phoronix.com
phoronix.com
It's still an excellent chip and I'm looking forward to using it in my designs, but beware of these limitations.
[1] - https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.p... p. 1350
This single erratum breaks my intuition enough that I'm "scared" to pull the chip into a design. I understand that they don't automatically break most use cases and that there are software workarounds. But they violate a core "Hi-Z is Hi-Z" understanding that I design around, and I'd really hate to respin a board over something so dumb. On an STM32 this would have been a silicon stepping and that's what bugs me about it.
One time I lived in an apartment that suffered from a variety of pests coming in. I expanding-foamed everything that looked like an entry point, the problem went away, and I stopped caring. However, I could still hear mice crawling around inside the walls late at night and decided just not to be bothered. This experience prepares one for embedded systems / microcontroller work ;)
Previous discussion: https://news.ycombinator.com/item?id=41479261
Things like logic analyzers are going to have similar issues where their inputs will have to be buffered to provide a suitably low impedance path.
It's not insurmountable but it's enough for me to just fall back on the RP2040 in situations where I don't want to spend the effort to validate the RP2350.
Could be an issue for logic analyzers, though usually you'd have a voltage translator in front of that anyway.
This happens on all microcontrollers btw. Random charge accumulates and pushes the voltage on your pin to some arbitrary point. The way you fix this normally is by providing a path for that charge to escape in the form of a pull-down resistor. Usually you need something in the 100k range. Because of this bug you need something more in the 5k range.
For some circuits that's fine, for others it's more problematic.
Many microcontrollers provide an internal, selectable pull-up or pull-down resistor (or neither). For example, on the STM32, it's a 30-50k, and individually selectable on a per-pin basis:
https://www.keil.com/dd/docs/datashts/st/stm32f10xxx.pdf#G11...
It's normal for pins to float, it's not normal for them to both lack an internal bias option and to float to a condition where they source significant current. You don't typically put a very low impedance external pull-down resistor on every single input pin.
That's not how it works; input does not mean sink current. An OUTPUT low sinks current, and an output high sources current.
In a "normal" microcontroller (with no silicon bugs), an input pin is in a high-impedance state ("Hi-Z"), meaning it doesn't sink or source current -- but it can be configured to have an internal pull-up or pull-down resistor, in which case it will (respectively) source or sink a little bit of current, enough to keep it at high or low voltage (i.e., enough for a logical high or low) unless there's something else driving it.
The problem with the RP2350 is that (under some circumstances) there's a current leakage between the pin and the voltage rail, so when a pin is configured as input with a pull-down resistor, the voltage will not go down to the low level it needs to read a logical low as expected: it will be at around 2.2V, which is in the "undefined" region.
And a complete set of new masks at 40nm would probably cost them around $1M which I can't imagine would make financial sense for them, unless their contract with the pad designer includes compensation for that kind of issue.
So sadly I don't think this is likely to get fixed.
The RP2350 is 2.65x the die size of the RP2040, so about 8000 chips per 3000$ TSMC 40nm wafer gives you $~0.35 per die. Say 10 cents per die for singulation and testing, and another 10 cents for packaging and processing into reels. I have no idea what the M33 per-unit license is, but something like 5-10 cents seems reasonable, so let's assume 5.
So that's a cost of $0.60 with a reel price of $0.80 for a $0.20 gross profit per chip. So the break even point for full respin of the masks is around 5 million sold chips, 10 million chips when we're including the original masks. For comparison, according to Eben Upton, 10 million RP2040s have been made (but not necessarily sold) from 2021 to 2023.
Would a fix result in 5 million additional chips being sold? Maybe, and for all we know they could be working on doing that just now. Maybe their contract with the pad design provider even pays for a new mask set and it actually costs them nothing. Maybe all of this can be fixed with a cheaper metal layer fix.
But either way this isn't 'peanuts' and it's not a clear cut if doing it is economically viable.
Having customers use an external pull-down is free (to the foundation) and costs nano-peanuts to each customer (i.e. cents per unit)
Was hoping for big improvements for the ADC, but its still limited to 500k/s (they did give it 4 more channels, though, which is nice).
They have a DDR (Double Data Rate) system that allows you to generate signals from bitstream shift registers that are twice the speed of the system clock.
This means one can generate ~300-400MHz signals from these ~$1 ICs.
Run this with the PIO subsystem, dual core 150MHz, Floating Point hardware, 512K (of expandable) SRAM and massive storage options.
Absolutely wild device and unlike most chips that are half-as-capable, cheap enough to stock up on in case of future supply chain disruptions...
That said it's not a good fit for wireless keyboards, that niche is served by ZMK running on nRF chips.
It's like XMOS but actually usable.
I don't want a framework that takes over an entire project and mandates the use of a given build system, configuration system, source code structure, etc. This tends to break apart when you want to have more complex build steps; eg. matrix builds, subsequent build actions on artifacts, integration with codegen like string interning, multiple target platforms which are likely not an ESP32 (like a simulation target running on the host), integration with linters/checkers, integration with test frameworks, etc.
And the technology choices ESP-IDF made are also... controversial (CMake and Kconfig! Plus a whole bunch of Python glue to actually make it work together).
Just give me libraries that I can build/link against and let me bring my own build system - or pick a build system that is actually extensible and will scale to more complex scenarios.
They even provide you with a fully offline SDK. Extract it and open a terminal and build things. No dependencies, no docker, no nothing.
Your criticism regarding their usage of cmake and the kconfig language hold a bit more water. I've never had any issue with the kconfig system (at least not since they've reimplemented the menu system in python instead of whatever it was) but I have hit CMake limitations a few times.
When you combine that with the powerful PIO, you get something that's really solid for:
* Game / system emulation
(You can easily emulate a mac128k on a pico, for example, without having to add an external SRAM.)
* Programming it in Python
(Less need to worry about the memory overhead)
* Projects involving a display and/or possibly very very very simple camera image acquisition and analytics
The ADC isn't too bad either. It's quite a bit better than the one on the ESP32 though worse than what you'll get with a dedicated ADC or those on a lot of 8-bit micros, but then you have to deal with the limitations of programming an atmega or something.I figured I'd get around to looking at the supply on a scope at some point, but you're saying that the ADC itself isn't very good?
There is also some noise from the Pi Pico power supply which could be a good thing if you're willing to average or filter over a large number of samples.
More details here: https://pico-adc.markomo.me/
Four times as many samples => half the noise (given some reasonable assumptions).
Personally, I would have really liked to get higher sampling frequency on the ADC. The raspis are quite limited in that regard compared to more "typical" microcontrollers (would expect 1MSPS or more). Supposedly some people had success overclocking the whole peripheral by a factor of 8, but I'm not so sure that is a good idea...
n The RP2040 ADC has a DNL that is mostly flat, and below 1 LSB. However at four values — 512, 1,536, 2,560, and 3,584 — the ADC’s DNL error peaks above this value. The ENOB for the ADC has been reduced from 9-bits (simulated) to 8.7-bits (measured), see Section 4.9.3. The DNL errors will somewhat limit the performance of the ADC dependent on use case.
For the record, I love these chips, despite the problems that came up.
The rp2040 is fabbed at 40nm. It's _really_ expensive to fab on things closer to the cutting edge, and the volume of rp2040/2350 sales simply isn't enough to justify it. (Also, it's harder to design and ends up binding you more tightly to a fab). At 40nm, adding 1MB of SRAM would literally make the chip more than 2x larger, which would increase the cost by quite a bit -- and probably make the SRAM slower. You can see a die shot / layout here:
https://www.raspberrypi.com/products/rp2040/
Notice how much of the area is already SRAM. That's hefty. It would make the chip more expensive without much of a corresponding return on applications enabled. People who need more SRAM can add an external SRAM if they need it.
From a more subjective point of view the peripherals are also less ugly to program for e.g. all DMA channels are created equal (no fixed mappings between DMA channels and peripherals). DMA channels can also trigger each other allowing both flexible double buffering as well as lists of DMA transfers.
Both the datasheet and the SDK code are also a lot more human readable than what you get from other vendors.
https://santroller.tangentmc.net/ is an open source firmware for plastic instruments (think Rock Band and Guitar Hero). Their primary target is the Raspberry Pi Pico.
Each iteration of the games came with their own bespoke controllers, with different circuits; yet at the end of the day, they're all just bags of buttons attached to a microcontroller. Santroller teaches the RP2040 how to convert those button presses to the format various gaming systems expect. Individuals can buy a Pi Pico and some wires to mod their own controller with Santroller. Or, you can go on Etsy, where people have had boards printed for specific guitars. Instead of soldering to a Pi Pico, you can plug the ribbon from your Guitar Hero World Tour guitar onto a RP2040 board that someone had made to accept the ribbons from that specific guitar.