How IBM invented the automated fab
spectrum.ieee.org
spectrum.ieee.org
I have often wondered if a chip fab that could make 1,000 chips of a given type economically (which is to say using your custom chip in your system was less expensive than adopting an off the shelf chip) would be a thing. The whole 'tiny tapeout' thing would be a lot more interesting too.
How does can hobbyist design be just be slapped onto a wafer (with others’ designs) and call it a day?
As a sibling comment notes, multi-product wafers are a theoretical answer. However, since you have process corners (manufacturing defects aren't uniformly distributed on the wafer), it is unfeasible for anything but the cheapest parts.
The real next moonshot in the foundry business would be to lower the respin costs, i.e., the amount of money it costs when your fabbed first silicon doesn't yield or validate functionally in the way you had expected/planned.
If I were the US government (or any other), I'd focus on that. Subsidize the respin cost to zero in the short-term, given certain prerequisites for start-ups, and push an all-out Manhatten project RnD effort to lower the respin cost in the long run.
For example, could one make a 200nm node with conventional UV masks and a limit of say 10 layers? Non mask lithography options? Or as in the article 'sub' masks where you step a single die image across the wafer?
You might be interested in structured ASICs, which allow for substantial reuse of masks between different products. At the extreme was a via-only definition product where all interconnects were specified with one mask (and the via masks were among the cheapest to make since they are very uniform).
In regular ASIC development, we've had extra unrouted transistors available to wire in case of a mistake (so hopefully the respin involved just some new metal layers). Techniques like FIB can be used to test fixes to lower the number of respins, too. I'm not sure how much of this was automated to maximize chances of being useful.
Offhand I'm not aware of a chip fab tech similar to the Laser Printer, not in a literal laser used to print but in a 'low run of tolerable quality' approach. The equivalent to a small print shop locally that has a medium-small range printer that does not use masks but churns out at high quality and speed.
Old nodes are fine for a lot of industrial applications, but they don't care about the full stack software as much.
The best seem to be those contracting the sand out and doing the rest. Nvidia, AMD, and all the new AI players.
Intel probably has the best chance at full vertical, but from everything I read it seems to be suffering from the same bloat IBM suffered.
That's a tall order - off the shelf is rarely very expensive for the functionality you get (that is, compared to design cost.)
And that's not necessary. If you could get a chip much more expensive but with specific advantages, you'd already have a business. See FPGAs.
You look inside a child's toy? A musical greeting card? A remote control? A $5 multimeter? ASIC. Often in the form of a black epoxy blob 'chip on board'.
You look inside a $30,000 industrial robot arm? No no no, we couldn't possibly afford custom silicon, FPGAs are the only option.
Second, volume! If you're going to make a million of something, the NRE of a relatively low-tech chip isn't so bad.
Also, FPGAs can be reprogrammed in the field if necessary.
The toys are also designed as make once and trash, since that's their sales model. The environmental costs of the resources aren't correctly factored in to the overall price. That super expensive robot arm is a tool that needs to work, it's economic value is in continued production. Modular components that can be replaced are more valued here to make warranty repairs and out of warranty field service possible. The customers literally demand and pay for that functionality.
So yeah, if you are going to churn out a million greeting cards, you might do a very simple and relatively inexpensive custom design (say not very many standard cells plain logic plus ROM of the exact size you need, slow, on a conservative node), and get a million slightly smaller custom chips and come ahead.
If you are going to ship a thousand robot arms. You might need a high performance chip costly to design - and would only amortize that design cost over 1400 chips. So no, you may or may not be able to afford that design, that's not the issue. The issue is that it's not worth it. If it's an expensive military robot arm that launches missiles, you stuff 4-5 FPGAs in there. If it's a cheap robot arm, you stuff a Raspberry Pi in there. Either way, no custom chip for you and it's not a question of "couldn't possibly afford custom silicon".
As far as I know, the same thing happened up the food chain; the company that did make our next ASICs (IBM, Essex Junction Vermont) has spun off that fab as well. So it goes.
Remember PowerPCs? That was IBM and was used everywhere from iMacs to Xbox 360s to Thinkpads.
Sadly, fabrication became commoditized because of outsourcing to Taiwan and South Korea, who gave unfair advantages to their state adjacent firms like TSMC and Samsung.
However IBM did design and build x86 chips in the 1990s, and these were used in Thinkpads.
Doh. You're right!
> However IBM did design and build x86 chips in the 1990s, and these were used in Think-pads.
Yep! Those were fabbed by IBM Microelectronics, along with a lot of server SKUed x86 chips back in the 2000s.
I think it's probably more accurate to say that a version(s) of AIX, Solaris, NT ( and I think a beta of OS/2) technically existed briefly for some models. While some commercial software might have been ported, I doubt it was ever officially supported. Except perhaps some AIX software? I assume it was binary compatible with PowerPC AIX.
IIRC, the GF 7nm process was rumoured to have the best specs vs. Intel, TSMC and Samsung.
A JP lab is continuing those efforts, at least.
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