He didn't say it implemented any instructions, I would argue that the memory ordering is quite important and part of why other CPU architectures can sometimes be faster or more efficient than x86, it takes effort to guarantee atomicity and apparent read and write ordering. And when a CPU was expending effort that means either transistors or time.

Apple also implements a couple x86 CPU status register flags not present in AArch64.

Besides TSO there are a bunch of ARM extensions designed to match x86 behavior. https://dougallj.wordpress.com/2022/11/09/why-is-rosetta-2-f... I'm curious whether Oryon and X925 implement these instructions and whether other emulators like FEX use them.