Intel Core Ultra 9 285K
browser.geekbench.com
browser.geekbench.com
https://browser.geekbench.com/v6/cpu/compare/7375555?baselin...
But without AVX512 and possibly much higher power consumption.
It is kinda exhilarating to see how much competition is going on with AMD, Intel, Apple and Qualcomm.
https://www.geekbench.com/doc/geekbench6-benchmark-internals...
The only significant difference between Intel Lion Cove and AMD Zen 5 is that the former has an instruction decoder that can decode 8 instructions simultaneously, while the latter has 2 instruction decoders, each of which can decode 4 instructions simultaneously. Other small differences will matter only in special applications, e.g. it is likely that Lion Cove can compute floating-point divisions faster.
Therefore it is expected that at the same clock frequency in single-threaded applications the performance of the Core Ultra 200K series will be almost the same as that of the Ryzen 9000 series, perhaps with a very small advantage for Intel. Because Arrow Lake S is made by TSMC, the top Intel models will no longer have a higher clock frequency than AMD, which will contribute additionally to very similar single-threaded performance.
In multi-threaded performance, there will be large differences between the applications that use 512-bit AVX-512 instructions and those which do not use 512-bit AVX-512 instructions. The former will be much faster on Ryzen, while the latter are likely to be faster on Arrow Lake S, because Intel uses a better TSMC process, with higher energy efficiency.
The new Skymont E-cores have double AVX throughput in comparison with the E-cores of Meteor Lake/Raptor Lake/Alder Lake, so the contribution of the E-cores to the throughput of multi-threaded AVX applications will be much higher than in the previous Intel hybrid CPUs. For AVX instructions, a 24-core Arrow Lake S CPU will have 3/2 more vector functional units than a 16-core Zen 5, while when using 512-bit AVX-512 instructions a 16-core Zen 5 will have 4/3 more vector functional units than a 24-core Arrow Lake S. So the ISA used for compiling a program will lead to great differences in benchmarks. Compiling for AVX-512 is not enough for Zen 5, 512-bit instructions must also be selected. For the older Intel CPUs with AVX-512 the 512-bit instructions were frequently avoided, because they lowered the clock frequency. On the other hand, on Zen 4 and Zen 5 the 512-bit instructions are always better.
Given how close the leading performers all are, the increase in total high end competition, and having alternatively licensed architectures in that mix we're getting the same types of generational improvements we did when Intel was the lone king. About the only people really floored are the ones rocking the iPad.
Who knows, maybe the X3D variants will still leave something interesting in the near term.
I wouldn’t draw conclusions about the level of competition simply based on the spread in performance.
Remember that with Olympic runners the spread is 100ths of a second. And yet the competition is fierce.
You may not be excited about a 10% improvement. I am not either. But that’s a different matter.
Sure, it's not the 90s where the highest end CPU is doubled every 2 years. It's also not the point where 10% is because we've just hit the limit (like the mid 2010s when everyone was saying the same thing and it turned out there was plenty of generational gain achievable). This generation sucks for desktops, it's just how it is and not something we need to make excuses for.
Now people are excited about +10% squeezed out through heroic efforts and more watts than my space heater.
I have a Ryzen 3950X and I suspect even now there’s a noticeable speed improvement at the top end, and I don’t feel like upgrading yet. That was still a big improvement over the Intel 3930K (?) I had before, even though sandy bridge was when progression started to show a slowdown.
I do think it’s perhaps easier to buy a computer with some weird bottleneck (crappy storage and the like) which will present day-to-day performance on par with your outgoing computer. Day-to-day high performance is seemingly hard to get right even if you can crunch numbers faster. Sort of a latency vs throughput problem.
Also squeezing ever more single threaded performance from inherently parallel scaling only (more transistors running at the same speed), as well as memory not being able to scale at the same rate as computing performance is really putting a damper on things.
3 years after the Apple M1, the M3 increased transistor count from 16 billion to 25 billion. Two years saw the 5950x with 8.3 billion transistors go to the 7950x with 13.1 billion transistors. That's quite not the predicted rate of scaling, but it is respectable.
2x the transistors doesn't mean 2x the performance though. We can make plenty of logic, but the DRAM to feed it remains high latency and the SRAM to hide the latency isn't scaling well either. PHYs are consuming proportionally more silicon too. One might say that Moore's Law isn't dead, but diminishing in relevance.