https://www.cpushack.com/2023/12/21/the-first-mass-produced-...
https://www.cpushack.com/2023/12/21/the-first-mass-produced-...
It does not make contact with any pins. The ceramic package has a depressed cavity with a grounded metallized base, on which the semiconductor die is soldered. So the ceramic body is made of at least two layers that are bonded one over the other. On the inferior layer, there is the large pad on which the die is soldered and many small pads that are connected to the pins by metal traces, which remain enclosed inside the ceramic body after its layers are bonded. The pads on the semiconductor die are connected to the pads on the ceramic body by wire bonding, typically with gold wires. The die, the pads that lead to the pins and the bonding wires remain at a lower height than the upper surface of the ceramic body.
Then the metal lid is soldered on the ceramic body, closing hermetically the cavity, without touching the wires or the pads. All this is done because no plastic (i.e. polymeric material) is completely hermetic to gases, so if there are contaminants in the air they will pass slowly through the package, reaching the semiconductor die. Later, there have been developed methods of depositing protective layers directly on the semiconductor die, which have diminished the need for hermetic packages, at least in most milder environments.
The actual DRAM integrated circuit is only the one from the top of the picture.
The other 2 packages are like the one from the top, but they appear to have an additional plastic cover put over the package, to prevent touching the pins.
That plastic cover might have been intended to avoid the damaging of the IC by technicians who did not use proper ESD protection measures when handling the IC. Perhaps the cover is not from conductive plastic, but from metal (though that would be an extravagant expense), but in any case it will be removed when the integrated circuit will be inserted in a PCB or in a socket. Its purpose is only avoiding electrostatic discharge damage during the previous handling.
On the IC from the top, the only one where the metal lid and the pins are visible, it can be seen that the top of the ceramic body had a metal trace that formed a closed square, on which the metal lid had been soldered. The lid covers a cavity with the silicon die, the bonding pads and the bonding wires.
As seen in the photo, the square trace used for soldering the lid is connected by a metal trace to one pin in the corner of the package, which is the ground pin, ensuring that the metal lid is grounded.
In the middle of the ceramic body there are similar metal traces that connect the bonding pads to pads on the lateral side of the ceramic package.
The pins of the IC are brazed to the pads on the lateral side of the package, before soldering the silicon die.
The image is not clear, because the lateral side is in a shadow, but the lateral side has one metallized pad for each pin that will be brazed over it, and the metallized pads are separated by non-metallized ceramic surface, so there are no short circuits.
I assume this cover is supposed to be removed after installation. So I think you are right in assuming it's purpose is there to avoid ESD damage during handling.
Wasting so much copper sheet for a cover that will be dumped during the PCB assembly is not wise, but in the Soviet Union they were rather careless about wasting materials, so this would not be unusual.
For other early MOS ICs or transistors, which were similarly sensitive to ESD damage, the vendors did not use so big covers, but only a metallic clip made of thin elastic wire, which was applied on the pins and which pressed on them until removed, due to its elasticity, providing thus a short circuit to avoid discharges.
However any such metallic shorts raised the cost, so they were replaced with delivering the ICs either contained in tubes made of conductive plastic or inserted in black sponges made of conductive foam.
I agree, it does look like it's shorting out all the pins. Maybe it's intentional, to avoid any weird currents or whatever forming while the chips are not installed? Possibly an early form of ESD protection?