The IMXRT1064 is around $7 and is also an M7 core with an HS USB PHY, programmable PLL-connected LVDS clock output, 2 EMACs, excellent hardened IP generally.
The IMXRT1064 is around $7 and is also an M7 core with an HS USB PHY, programmable PLL-connected LVDS clock output, 2 EMACs, excellent hardened IP generally.
The big thing holding me back was that their crypto accelerators were all locked behind NDAs (a dealbreaker for F/OSS work) while the ST ones are documented in the freely downloadable datasheet you can just google up.
But I did find some third party wrapper libraries that seemed to be able to use the crypto registers so it might be possible to figure things out from that. I haven't tried yet.
The other issue I had with the RT is that they lacked internal flash so PCB complexity is slightly higher than with a STM32.
Keep in mind the dual-core 11xx chips are a bit harder to boot than the rest of the line - but you probably need the power domain flexibility for most FPGA projects (1064 has way fewer practically-usable 1v8 banks.)
> crypto accelerators were all locked behind NDAs
I've been able to use every bit of hard IP and high-assurance boot from registers using no vendor code whatsoever.
Here's what you are looking for:
https://github.com/JayHeng/imxrt-level2-boot/blob/master/dev...
> The other issue I had with the RT is that they lacked internal flash
The IMXRT1064 has a 4MB Winbond QSPI chip in-package, by the way!
> PCB complexity is slightly higher than with a STM32.
The Xilinx FPGA that is sitting next to your MCU incurs multiple orders of magnitude more PCB-complexity than a little QSPI flash, haha.