An Analog Network of Resistors Promises Machine Learning Without a Processor
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What they have is a transistor network, and they constrain all the transistors to the ohmic regime, so now the resistivity of an individual transistor can be some nonlinear function of its inputs, which is really cool, like detuning transistors to do analog computation instead of digital.
Here’s the preprint: https://arxiv.org/abs/2311.00537
I love it when things are linear to first order.
>.>
But seriously, my actual question is whether an ideal resistor network can compute nonlinear functions since the individual resistors are linear in their input, ignoring possible nonlinear effects like temperature dependence of the conductivity of the resistors
Using an analog approach could be vastly more efficient as operations are inherently parallel. You can fire off every neuron in a layer simultaneously and produce a result within nanoseconds, for basically any number of neurons. You could probably do the entire network as a single atomic operation, but that's a bit beyond my knowledge of neural networks
If you are allowed switches in the network and the input is a fixed voltage then things get interesting.
A network of transistors operating below saturation makes much, much more sense. It's really directly analogous to how we compute neuron activation in software, but inherently massively parallel.
transistors are essentially non-linear, but they amplify and can be made to amplify linearly through the use of feedback resistors: if you divide the output voltage across a resistor pair which fixes the output as ratio to the input voltage, that geometric relationship will hold across broad range of input/outputs. for most applications you want linear amplification. (transistors work as a function of current, but passing the current through resistors yields a voltage measurement) a transistor can be thought of as resistive if you treat its voltage:current relationship as a measurement of resistance.
Bringing all those numbers together we get 1 neuron = 32 nodes = 1sqm, would give a size of about a 900m square if breadboarded out for ordinary MNIST digits. (Assuming of course, no power transmission losses...!)
I'm hoping, if not outright assuming, that I've made some kind of catastrophic error here.
Memristors were the missing fourth, and "imagine what you could do with that!" My imagination did not extend very far. Everything was being built with those other three and the non-linear components.
It'll take a while to overcome that momentum.
I feel like IPv6 has a similar barrier. I'm mostly an infosec nerd and I've been through a lot of training and education. Never once seen IPv6 treated beyond, "it has more bytes, firewall it off".
It's not clear in the paper if this problem was addressed or if the rapid training possible meant that in practice they never had this issue.
Edit: downloadable link [2]
[1] https://ieeexplore.ieee.org/abstract/document/10323917/
[2] https://publikationen.bibliothek.kit.edu/1000161182/15110728...
https://www.damninteresting.com/on-the-origin-of-circuits/
Summary:
- Researcher took a FPGA
- used genetic algorithms to have the FPGA identify first tones and then more complex audio sequences
- there was no clock or timer used
- when they found a good solution, they tried to copy over the FPGA "configuration" to another identical FPGA.
- that didn't work!
- they assumed it was b/c the genetic algorithm + no timer had found a quirk in the specific FPGA unit and used that to help improve the processing quality
Ecerybody promises "Machine Learning", but the machines never learn. /s