- "Meta seeks ASIC designers for ML accelerators and datacenter SoCs" (2024) https://news.ycombinator.com/item?id=39485115#39518293 :

> With some newer architectures, the GPU(s) are directly connected to [HBM] RAM; which somewhat eliminates the CPU and Bus performance bottlenecks that ASICs and FPGAs are used to accelerate beyond.

- "Jim Keller suggests Nvidia should have used Ethernet to link Blackwell GPUs" (2024) https://news.ycombinator.com/item?id=40027933 :

> The HBM3E Wikipedia article says 1.2TB/s.

> Fiber optics: 301 Tbps

- "New RISC-V microprocessor can run CPU, GPU, and NPU workloads simultaneously" (2024) https://news.ycombinator.com/item?id=39938538

- eGPU enclosure with USB A and USB C ports, too

- iGPU + dGPU