Hacker News Reader

Comment by Narishma | Hacker News Reader

Yet another "GPU" providing no graphics functionality. IMO theses should be called something else.

The first question is why is there a divide between CPUs and GPUs in the first place. Yes, the gap is closing and both categories are adding features of one another but there still is a significant divide. IMO it has to do with Amdahl's law [0]. In that sense CPUs should be called Latency-Optimizing-Processors (LOPs) and GPUs should be called Throughput-Optimizing-Processors (TOPs).

More specifically [1] we could also call CPUs long / deep data dependency processors (LDDPs) and GPUs wide / flat data dependency processors (WDDPs).

[0]: https://en.wikipedia.org/wiki/Amdahl%27s_law [1]: https://en.wikipedia.org/wiki/Data_dependency

The observation that graphic hardware and general purpose CPUs converge and diverge is not new: http://cva.stanford.edu/classes/cs99s/papers/myer-sutherland... .

But as you observe, we are stuck in a local optimum where GPUs are optimized for throughput and CPUs for latency sensitive work.

TPU, a Tensor Processing Unit

Tensors are just n-dimensional arrays

Then you can run software (firmware) on top of the TPU to make it behave like a GPU.

I've been thinking about starting a project to build a 'display adapter', but I've gotten stuck before starting as I wasn't able to figure out what is the communication protocol between UEFI's GOP driver and the display adapter. I've been trying to piece it together from EDK2's source, but it's unclear how much of this is QEMU-specific

MPU- Matrix Processing Unit.

I think the establishing term is AIA, AI Accelerator.

That would ignore applications like crypto mining, which I'm guessing is still a biggie.

What is it exactly that sets these units apart from CPUs? Something to do with the parallel nature of the hardware?

CPUs are also pretty parallel. They have multiple cores, each of which can execute multiple instructions working on multiple data items all in a single clock cycle.

the fact that they are not central. they work as a coprocessor.

However, a CPU could easily embed an AIA, and certainly, they do.

The distinction that seems to be important is the warp-thread architecture: multiple compute units sharing a single program counter, but instead of the SIMD abstraction they are presented as conceptually separate threads.

Also they tend to lack interrupt mechanisms and virtualization, at least at the programmer API level (usually NVIDIA systems have these but managed by the proprietary top level scheduler).

I have seen the term NPU used in reference to neural network accelerators a lot. I think AMD, Intel and Qualcomm all use this term for their AI accelerators. I think Apple call their AI accelerators neural engines, but I've definitely heard others refer to these as NPUs even though that's not their official name.

I'll be honest I've never heard the AIA acronym used in this way. It seems all acronyms for all processors need to end in PU, for better or for worse.

GPGPU

Easy, it's now a General Processing Unit. Or perhaps a Great Processing Unit?

But how is that different from a CPU?

It starts with a G.

It's not the central processor.

It's a coprocessor. They have existed for a very long time.

It's a brocessor.

Is that pronounced gee pee you, or Gip Pee You?

Haha I love this project but it's just PU

...Won't sound offending... But, but ...a Graphics-card; has "Ports (to attach a Keyboard on to)", RAM (verry fast), CPUs (many) and may be used like a full Computer, even without been driven by someone else like ...You -I suspect, not ?

...I for my part want to say thanks for the findings! :-)

[Setting:Weekendmodus]

Reply on news.ycombinator.com