Comment by yjftsjthsd-h | Hacker News Reader

Comment by yjftsjthsd-h | Hacker News Reader

So this is for an all-custom computer, which is rather more impressive on its own (to say nothing of "So I made a C compiler."), but now I'm curious what the minimal implementation of an ethernet card for a "normal" PC would be. I suspect a lot of it would be very similar, up to that you could do checksums on the PC's CPU (probably just baked into the driver). It'd need to be attached - either bare serial or more usefully USB? And then you'd either need to write a "real" driver for it or else plumb through to userspace and do it there. For similar things I've eyeballed having the device implement https://en.wikipedia.org/wiki/USB_communications_device_clas... so it "just works" without needing to do your own driver, but I don't think that would play nice with things like doing all the checksums host-side. Or... while searching for that, I stumbled across https://en.wikipedia.org/wiki/Ethernet_over_USB , which maybe suggests that you can just build an adaptor that translates the physical connection to USB and then let the computer magically handle all the rest for you? Dunno, over my head.

USB is arguably much more complicated than 10base2 internet, which pre-dates it by a long way. In fact, if you're trying to use either PCIe or USB to connect to a 10base2 ethernet network, either of those will be far more work than the Ethernet side.

You might be able to persuade a FTDI-style USB device to bit-bang 10base2 Ethernet for you. You'd implement a "PHY" side which translates the wire traffic to a clean bitstream and aligns the frame start and then just have the PC handle all of it in software for you.

Oh, good point. I guess it depends on your usecase. I was thinking from the angle of not trusting premade network cards but trusting your USB chips.... which now that you point out, is also not a given. Maybe bare serial (just a wire per tx/rx), but it suddenly occurs to me that I don't know how that's actually connected to the CPU, and I think that approaching this from a security angle is a quick road to madness. OTOH... connecting a microcontroller to serial probably is the simplest option and as an engineering exercise is perfectly reasonable, if not exactly fast, but hey it's not like this was ever going to be performant.

> Maybe bare serial (just a wire per tx/rx), but it suddenly occurs to me that I don't know how that's actually connected to the CPU

In practice today, if you have a DB9 serial port, that goes into the section of the chipset which is concerned with all the "legacy" interfaces, which ultimately turns up on the PCIe bus like everything else.

> I think that approaching this from a security angle is a quick road to madness

Yes.

USB LS/FS are pretty implementable in select FPGAs and MCUs without a dedicated PHY.

Ironically, USB SS is more implementable than USB HS without a dedicated PHY. USB SS's PHY is just standard CML differential signaling used for almost all modern high-speed protocols like PCIe or SATA (but with an LFPS extension for link negotiation), most FPGAs already have built-in support for it. Meanwhile USB HS's PHY is a completely non-standard one: it's LVDS-like but the signals are not fully differential, it's half-duplex and needs bus arbitration, etc - only USB HS PHYs speak this odd language.

If a normal PC had an ISA bus (like they did 30 years ago), my network card could have been connected to it with just some minor modifications.

not being pedantic, just rounding out the record, ISA's follow-on, EISA, had already been around a while and was already sunsetting 30 years ago because PCI had already been invented. VESA also was ending its brief flash of glory.

Funnily enough modern machines have ISA in form of LPC bus used for few of the common peripherals (TPM) that can be used in ISA-compatible mode, and you can get LPC to ISA adapters.

They do apparently have an spi bus inside the pcie standard. Don't know if it would be possible with that or not though.

Implementing NICs in FPGAs (typically with PCIe attachment) is super common.

Regarding USB: CDC-NCM isn't hard to implement in any MCU but implementing a USB HS PHY basically requires ASIC hardware.

If you use a $0.30 USB HS ULPI PHY, one could implement USB CDC-NCM in an FPGA pretty easily.

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