I don't think that even ISAs today are easy to design. They look easy because the primary deliverable is thousands of boring pages of specification (obviously plus simulators and reference designs and probably other things). The actual issues today are things like concurrency and memory consistency model, which an ISA would require parallelism hardware experts to design it correctly and effectively. And the possible interactions of ISAs at the level of SoCs design, this is basically an open problem. And there are already many nuances about ISAs today which affect microarchitecture, power, ISA extensions like signal/neural processing, etc., and these matter even to consumer markets (in contrast to high performance / industrial computing) because a computer company ultimately wants to be cost efficient going about this.
I did some more reading last night. It turns out the biggest reason given is that ISA is a duopoly between x86 and ARM: that is, this is patent minefield. Anyone who tries to make a new ISA has to avoid patent troll traps, this was from a scholar.google paper. It's a good economic point, that by creating a high barrier to entry, the duopoly has inhibited ISA development for many years. The RISC-V being a way out of that, is one promising answer.
Also I found that Apple pays much less royalties to ARM with its special license compared to other companies (including but not only Qualcomm) that license ARM. The architectural license is supposed to cost especially more, but Apple gets a special discount for historical reasons, like 30 ¢ per chip.
A couple articles also point out that Apple with its RISC-V R&D can use it as leverage when renegotiating - "If ARM doesn't give us a good license deal, we'll just switch to RISC-V!".
A related point is that there's a lot of infrastructure around ISA - testing/validation flows, compiling, etc., and ARM has a huge ecosystem of this. Here I guess Apple could do this, they could grow their own, which becomes a matter of time and cost. So it's more a practical reason to go with an existing ISA and then extend it, or modify the microarchitectural implementation or even redesign it completely.
From a scientific standpoint, there will probably always be a need for new ISAs. For every new HW/SW concurrency model or new paradigm (deep nets looming on the horizon), there will be revisions to the HW/SW interface. Note also that the Spectre authors wrote that proper the way to avoid such exploits is to fundamentally change instruction set architectures. About 15 years ago I met people (professors) who thought computers were basically done, today I'm not so sure any more.
P.S. RISC-V itself is a ground-up creation after its designers looked carefully at OpenRISC and decided not to build on it, for technical reasons. History will probably repeat itself.