Iris (Infra-Red, in Situ) Silicon Verification Project Updates | Hacker News Reader

Iris (Infra-Red, in Situ) Silicon Verification Project Updates

bunniestudios.com

96 pointspabs39 comments

From the earlier blog post:

https://www.bunniestudios.com/blog/?p=6712

>"This post introduces a technique I call “Infra-Red, In Situ” (IRIS) inspection. It is founded on two insights: first, that silicon is transparent to infra-red light; second, that

a digital camera can be modified to “see” in infra-red, thus effectively “seeing through” silicon chips.

We can use these insights to inspect an increasingly popular family of chip packages known as Wafer Level Chip Scale Packages (WLCSPs) by shining infrared light through the back side of the package and detecting reflections from the lowest layers of metal using a digital camera. This technique works even after the chip has been assembled into a finished product. However, the resolution of the imaging method is limited to micron-scale features."

This seems to be a set of ideas that is on the right track -- it would be interesting to know the minimum size of chip features that Infrared Light will work on, and upon knowing this, to try to improve upon that by using other wavelengths (i.e., UV, EUV, ?), types of light (i.e., infrared or other wavelength laser), and/or other beam lensing/focusing/detecting techniques...

Perhaps in the future, IC shells will be made of materials that not only perform the functions that they do now (heat dissipation, etc.) -- but are also friendly to different types of EM wavelengths (i.e., higher wavelengths to allow scanning of smaller feature sizes) that could be used for visualization/verification of the underlying electronic components and circuits...

Anyway, this set of ideas will probably be refined and expanded upon in the future...

The ultimate future goal would be a device which could read the internal circuitry of any chip at any time with absolute fidelity -- regardless of how tiny the components and circuits of that chip might be...

Cameras similar to this have been around for decades, but they weren't as automated, and they were more expensive since they had longer Depth of Field for research purposes. But fundamentally, putting an IR back (or front) illuminator on a microscope with IR lenses and a CCD was necessary and available for wafer stacking decades ago (I used them in the early 90s). This looks like it has a motion stage and automated scanning, which is important for doing the verification!

I don't think you're going to get crazy high resolution. The minimum wavelength of light that goes through silicon at even 0.5% (it's >50% down to 1.2um) is ~0.9um. There are specialized techniques (top illumination) for super-resolution like confocal microscopy that can get quarter-eighth wavelength ~120nm as described below, but that's about it. A bigger issue will be that, if there is too high a density of metal, you just won't be able to see through. However, you will almost certainly be able to see the large features, the structural areas (RAM/Logic/Serial) for identification, and the Through Silicon Vias (TSV) used for aligning die together for MCM, but not the underlying logic.

https://www.tydexoptics.com/materials1/for_transmission_opti...

https://www.photometrics.com/learn/spinning-disk-confocal-mi...

The resolutions needed for reverse engineering will still rely on layer etching/removal and SEM.

What a super important project! Very well done to the researchers and I really, really hope you get funding and/or people joining and taking this all the way. Please keep it up!

Been involved with a physical supply-chain assurance technology project and this is the first time I heard of this kind of IR chip scanning.

For those that don't understand; securing the provenance of physical hardware is the foundation of all other cybersecurity.

VCs and money people... this is where you should be placing your bets!

It doesn't actually matter if/that it's not terribly effective at the moment. Keep building and roll it out. Get people using cheap scanners and publish open hash databases. Even with false positives it becomes like "effective security theatre" and is a massive deterrent to anyone attempting implants or stealth logic modification at silicon or board level.

That's "bunnie" Andrew Huang. He's great and been working on this for a long time!

Given that silicon has quite a high refractive index, I do wonder if it would be possible to pull the same trick as the "immersive lithography" people here. But I don't know enough about optics - I wonder if you can get away with a tiny air gap if most of the optical system is from higher refractive index material.

That's an interesting idea. I think you might be able to do reflective optics around a single crystal silicon core in near contact to the wafer backside. You'd get another factor of 2.5x, which along with confocal imaging would be 50-65nm and that's almost good enough to image modern cells.

Cool!

I guess this method would put some constraints on PCB design, since the need to scan the die physically would mean that you'd need a margin around it where nothing protruded higher vertically.

Isn't the idea with IR that you can transmit through the silicon and part of the package. There are slightly higher resolution options like IR confocal microscopes https://www.wdidevice.com/products/ and X-ray can do some similar stuff.

You don’t actually want to be able to hit most chips with light. There’s efforts to encapsulate some WCSP devices in opaque coatings specifically because the silicon itself can be affected by light.

Here’s an example of this behavior reported on some ADI parts: https://ez.analog.com/power/f/q-a/559687/photosensitivity-of...

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