What's the recommended way to learn RISC-V assembly (including SIMD)? For ARM I just found a book I liked and did the exercises on my Mac M1 (replacing system call numbers etc and changing page sizes).
https://riscv.org/technical/specifications/
riscv64 Linux syscall numbers are the same as arm64 ones. Just put the syscall number into `a7` instead of `x8`. And args in `a0`..`a3`, obv. Use `ecall` instead of `svc 0`. Boom!
specifically i installed gcc-riscv64-linux-gnu and qemu-user-binfmt
also i read the risc-v spec and assembly programming manual
i also got some risc-v single-board computers but haven't done anything with them yet
i haven't been doing anything with the v extension, which i think is the most widely supported simd-like extension; though it's not exactly simd, it offers the same kinds of benefits for the same kinds of applications
The assembler accepts either syntax:
user@starfive:~$ echo add a0,a0,13 \; addi a1,a1,420 | as
user@starfive:~$ objdump -d a.out
a.out: file format elf64-littleriscv
Disassembly of section .text:
0000000000000000 <.text>:
0: 00d50513 add a0,a0,13
4: 1a458593 add a1,a1,420
thanks for the tip about no-aliases! i had no idea. i don't suppose there's an option to allow me to write arm-ual-style `add a1, a0` instead of `c.add a1, a0` or `add a1, a1, a0`, is there? because in the first case i can't assemble it without rvc, and the second case is annoying
i guess i should write my own assembler instead of whining
for the genral assembly there isn't mutch to learn tbh, look at the isa reference card and maybe also look at the B (bit manipulation) extension: https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/...
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Here are some resources on RVV I can recommend:
RVV spec (also look at the examples in the repo): https://github.com/riscv/riscv-v-spec/blob/master/v-spec.ado...
RVV intrinsics viewer: https://dzaima.github.io/intrinsics-viewer
Tutorial: RISC-V Vector Extension Demystified (3 hour video going over every instruction): https://youtu.be/oTaOd8qr53U
RISC-V Vector extension in a nutshell: https://fprox.substack.com/p/risc-v-vector-extension-in-a-nu...
If you want to see a more complex example/real world application, then you might also be interested in my article about vectorizing unicode conversions: https://camel-cdr.github.io/rvv-bench-results/articles/vecto...
In terms of development I'd recommend using qemu and a cross compiler, or if you want hardware try to get the kendryte k230 (currently the only sbc with rvv 1.0 support) or wait a bit for better hardware (BPI-F3 and sg2380 should release this year).