It's pure FUD.
The x86 world somehow survives with MMX, SSE, SSE2, SSE3, SSE4, AVX, AVX2, AVX512. The Arm word has a few incompatible variants too, with VFP, a couple of variations of NEON, SVE, SVE2, MVE.
In comparison, RVV draft 0.7.1 and ratified 1.0 are practically the same thing.
With GCC 14 transparently compiling unmodified code using RVV C intrinsics to either 0.7.1 or 1.0 there is very little cost or reason not to support both.
RVV 0.7.1 is available in the vast majority of RISC-V SBCs in the world today, from the $5 Milk-V Duo (1.0 GHz C906, 64 MB RAM, 256M & 512M available for a few bucks more), to the ~$30 Lichee RV [dock] and MangoPi MQ Pro, to the $120-$180 Lichee Pi 4A, to the $2500 64 core Milk-V Pioneer.
With the sole exception of the CanMV-K230 (single core, 0.5 GB RAM), if a RISC-V board on sale today doesn't have RVV 0.7.1 then it doesn't have vectors at all.
it's wonderful news that gcc is able to paper over the compatibility problems now