Newer languages are even easier. Rust and Go almost always port with zero issues. Obviously the same goes for scripting and VM based languages like Java.
The architecture matters less than it used to.
Newer languages are even easier. Rust and Go almost always port with zero issues. Obviously the same goes for scripting and VM based languages like Java.
The architecture matters less than it used to.
Apple has actually put a lot of effort to make the x86 to ARM transition as smooth as possible regarding memory consistency model, this is a strong indication that it's not as trivial as you seem to think.
RISC-V has a standardised (optional) TSO memory model mode, plus "fence.tso" instruction that works in normal mode, even on CPUs that predate it (it defaults to the stronger "fence rw,rw" in that case). Well, assuming the CPU core designer read the spec carefully and doesn't trap on unknown "fence" instructions (looking at you, THead...)
I was speaking to whether the code will work. The answer is almost always yes. Optimizations at a higher level such as algorithm choice or where allocations are performed also are architecture neutral. This is most optimization.