Comment by xenadu02 | Hacker News Reader

Comment by xenadu02 | Hacker News Reader

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Intel used to have the fab lead over everyone else, generally being 1-2 generations ahead. That persisted for at least a decade. Then they had a huge whiff. Their 10nm node was due in 2016 and they didn't start volume production until 2019. That gave TSMC a huge opportunity to catch up and pass them which is exactly what they did... TSMC went volume on 10nm in 2017.

Samsung is behind a generation (or thereabouts). Not sure why exactly.

AMD spun off their fab as GlobalFoundaries. The separate company bowed out of the bleeding-edge fab business. Their 14nm node was licensed from Samsung and they completely cancelled their 7nm node.

As bleeding-edge fabs kept getting more and more expensive lots of companies decided to go fabless. They were able to do that because unlike everyone else TSMC doesn't make chips for itself so it doesn't represent a competitive threat. This is the real key to TSMC's success.

Other companies like GlobalFoundaries and ON Semi are filling volume with older process nodes like 14nm. There's a large number of chips needed by millions of manufacturers large and small. Only a small proportion of those need the power/perf you get from the latest and greatest. Manufacturing on an older node is cheaper thanks to lower capex and much much better yields.

Eventually I think we'll see litho equipment make its way into the niche market similar to 3d printers. We've seen some people hacking together stuff to make their own chips in a garage... they're tiny 5-2000 transistor affairs but it would be quite interesting to be able to churn out a custom chip with a million transistors on it.

A cottage industry does seem to be within the realms of possibility, and 3D printing is an apt comparison. However, it’s likely to be prone to the same challenges - input materials (filament and wafers) will be subject to variable quality and environmental factors (moisture, heat, dust), and the machines themselves will take some time to mature (how many iterations of incompatible 3D printer ‘standards’ have cropped up in the two decades since DIY printing emerged in the scene?).

The nirvana of a household printing capability never really materialised.

I wonder why none of the trillion-dollar club members with "infinite" money, e.g., MSFT or AAPL, are building bleeding-edge fabs in locations that are geopolitically more stable than Taiwan. If TSMC tanks, then these companies will also tank by a massive amount, much more than 20 bln.

> Eventually I think we'll see litho equipment make its way into the niche market similar to 3d printers...

Won't you be better served with a FPGA? Are there any cases, besides hobby projects, where making you own silicon on a process many generations behind the state of the art would make sense?

With 3D printers, there are parts that are simply impossible to make without them, and there is no programmable plastic, so it makes sense to use them. In fact, we are starting to see entire factories churning out plastic parts from FDM printers not so different from what consumers buy. In the case of Prusa, they even make the parts using the same printers they sell to consumers.

Please explain this to me, isn't the lithography equipment from ASML that does all the hard work of imprinting the wafers? If Samsung and Intel buys the same machines why can't they make the chips with the same transistor density?

Michelangelo had the same chisel and tools as every other artist of his time.

Why didn't they just make art with the same quality?

It's not just what tools you have, but how you use them.

You don't just go plug in one of these machines and it starts pumping out working chips.

Increasing density means better controls and processes, better knowledge of running and calibrating the machines.

Tons of processes before and after the ASML machines.

You don't just buy the machines or build a fab.

Each fab is the development of an entire "process". Furthermore how the machines are used varies greatly. Everything from exact doping and cleaning processes to metal deposition parameters, plus the masks you feed into the system which these days are all interference-based - that is you rely on the interference patterns because you can't actually make masks nor use light of a wavelength small enough to create 14/10/7nm feature sizes. The mask you make is nonsense but the interference pattern it creates results in the actual patterns you want.

How many layers, how you can intersperse metal vs silicon layers, allowed dimensions for gates, wires, distances between components, and a whole host of other things are unique to the specific process. Oh and parameters vary based on what you are making on a given process (eg SRAM vs logic). Different layers can have different requirements as well. You might not even be able to take a design to another fab from the same company on the "same" process node, let alone a competitor.

This stuff is all extremely closely guarded by every fab. If you're a serious customer (read: $$$$) the fab will share these parameters with you so your engineers can design to that spec. Then your first run will likely have problems and need to work with the fab engineers to tweak layouts and such to get usable yields - depends on how much you are relying on the fab for design/layout. TSMC will happily license you certain blocks to use in your design along with guarantees on yield since the design is made for their process from the start. You can also license designs (eg from ARM) that are pre-customized for a given fab's process.

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