Why is Ivy Bridge so hot?

I haven't looked at the flux-less bonding patents mentioned in the article, so I'm not sure just how difficult it would be to create that bond without flux, but otherwise it shouldn't be that difficult in principle to spread a thin layer of solder paste, then attach the heatsink and heat them to reflow and form the bond. That's basically how the QFN[1] and other 'no-leads' ICs are mounted.

There are 2 big problems though: You've got a huge overhang area, so if you do use flux, it's not going to be able to escape, and will stay as voids in the joint. But if you don't, you'll have to find some other way to replicate the cleaning and oxide stripping behaviour in order to get the solder to bond properly. Chemical cleaning and then storage/soldering in an inert atmosphere might help, but I don't know.

Secondly, and perhaps more importantly, it's really quite hard to reflow (heat to melting point) the solder layer attached to your big heatsink, without bringing the whole assembly up to that temperature (what with the whole point of the heatsink being to get heat away from there as fast as possible). And if you do that, even if you don't fry the chip straight away, you've now got all that thermal energy stored in the large mass of the heatsink to dissipate. And it has to be done relatively evenly to avoid mechanical stress on the joint due to material expansion/contraction.

Actually yeah, having thought it through, it is going to be pretty tricky :)

[1] https://en.wikipedia.org/wiki/Quad-flat_no-leads_package

Thankfully, someone already sells that. http://indigo-xtreme.com/

Does anyone know if any commercial CPUs have been packaged factory fused to a heatsink?

There are 200W Power 7 CPUs, and they don't have to worry about aftermarket cooling like high end x86 CPU manufacturers do. It seems like it could really make sense there.

Why do that when you can take the IHS off and attach the heatsink directly to the silicon? You know, like everyone does on their laptops...

The only Ivy Bridge chips that are out are engineering samples. It's good that people are bringing it up, but this is likely just a beta thing. Maybe they wanted to be able to remove the IHS...or maybe they didn't want people to know the final overclocked performance characteristics for some reason.

Why not? The harm is to heat dissipation at high clock rates and voltages -- basically to overclockers. The targeted clocks at the performance points they are aiming at don't have any trouble staying in reasonable temperature ranges, so why bother?

Lots of this is market based, not technical. The only competitors to Ivy Bridge are from AMD, and frankly don't compete well. There's simply no pressure to produce a "pull out all the stops" max performance chip. They have a comfortable margin even with comparatively poor heat sink designs, so they might as well save the nickel.

I could also be that (if true) using the paste could meet their engineering/temperature requirements and using solder to conduct the heat was overkill. In this case, the only ones that would feel the pinch would be those that overclocked the chips.

The biggest problem I'd imagine with the direct-soldered die is that it's a much more rigid interface, which means any localised heating is going to put much more mechanical strain on the die.

In contrast, the TIM is much more flexible, and the reduced heat transfer might actually work in its favour, by buffering sudden thermal spikes to reduce the cross-die gradient (and thus stress).

No, the next generation is a "tock" in Intel parlance, which is a whole new microarchitecture.

Or a Bond girl.