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Comment by schiffern | Hacker News Reader

A bit (trit?) of background: https://web.williams.edu/Mathematics/sjmiller/public_html/10...

I'd be curious whether the same result holds for balanced ternary, as used in some early Soviet computers. https://en.wikipedia.org/wiki/Balanced_ternary

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It doesn't matter what the voltage levels represent ([-1,0,1] in balanced ternary or [0,1,2] in "normal" ternary). The only thing that matters is that you're working with 3 voltage levels instead of 2, which as the paper shows increases the circuit complexity above the "break even" point of log(3)/log(2).

The paper shows that a worse implementation is possible, sure. It's not obvious that it shows that a better implementation is impossible. Logic tells us that these are very different things, and the latter is vastly harder than the former.

I did notice the paper hinging on a lot of implementation details. For one, they only propose using voltage dropping resistors, but no discussion of having three power rails (eg +1, 0, -1), or some hybrid approach. Maybe some part of power regulation belongs outside the chip, folks!

They also implement a ternary adder by.... converting it back and forth to binary! They justify this by saying this is the only way to implement an "arbitrary" truth table. Okay. You don't need an arbitrary table, just one! The truth table, of course, depends on the choice of balanced vs. unbalanced. This seems like an unforced error.

The paper's result (if confirmed) might indeed hold for balanced ternary, but it's not immediately clear that this is a trivial extension of the existing paper.

Better url for the Hayes article: https://www.americanscientist.org/article/third-base

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