Transputer.net
transputer.net
transputer.net
The UK government launched a number of programs to try and get things moving. One, the BBC Computer Literacy project, gave us the BBC Micro, Acorn, amd eventually ARM...plus a generation of Gen X people here on HN who cut their teeth on the 6502 and Z80 cpus inside the BBC micro andnits competitors.
The other was to throw money at any UK firm that looked like it could be the basis for a modern tech industry. A parallel stream at that time was the fear that Japan would leapfrog the West with so called "4GL" systems and hardware just like they had done with cars and consumer electronics. I imagine that Inmos, with some flashy innovation, must have looked pretty sexy to the UK government at that time.
There were lots of issues with the running of the company of course, but I think it was the sale to Thorn-EMI (a really unsuitable owner) that ultimately sealed the fate of the firm.
https://en.wikipedia.org/wiki/Fifth_Generation_Computer_Syst...
While I consider myself very well versed in the computing and supercomputing space from the 1990s onwards, I never heard of the transputer before then and used that opportunity to learn as much as I could from the plethora of books and documentation that the university library had on them.
I was shocked at the parallels between transputer design and modern supercomputer, SoC, and superscalar processor design principles that were in widespread use by 2007. The transputer was well ahead of its time. And while it never achieved fame and fortune, it seems to have certainly influenced many many other technologies that did.
The first three words on the page should be, "A transputer is..."
Unless I'm mistaken, the only thing that lasted was the // single line comment syntax from Occam.
I was at Loughborough and we had to do real time systems using occam . . . it was great! The problem with occam (and transputers generally) is they are a bit too static at build time, and so are very fault intolerant, which isn’t great in many real world applications. Consequently I tend to think CSP works in the small and the Actor pattern is better in the large.
In particular I suspect there is a useful correlation between synchronous message passing and maintaining program invariants which is obfuscated if your primitive is asynchronous queues.
Related though much later, ocaml https://github.com/ocaml-multicore/reagents observed that the send/recv primitives make less sense than a swap primitive. Between occam and the current ocaml effort, concurrent ML is the same sort of model with the details really well thought through (e.g. a thread executing stop gets garbage collected).
I also ran into the Inmos Transputer while I was at UWaterloo but didn't get a chance to use it myself, due to limited availability at the time.
Synchronous message passing, as in wait for the other guy then swap, is a different thing to pushing work into a queue to be dealt with later. Not just a buffer of size one; the current thread actually blocks until the exchange occurs.
It's another step in the direction of decreased throughput for decreased entropy and I think it's an important one. I personally missed the distinction for a good decade or so, seems plausible others have likewise missed it.
It was typically used in military systems such as radar processing, but also found use in the Atari Transputer Workstation (ATW)(https://en.wikipedia.org/wiki/Atari_Transputer_Workstation)
It never did take the world by storm, though, and it seemed completely irrelevant as a practical architecture by the mid 90s. But I did like the elegance of parallelizing code in Occam. Code blocks were introduced with SEQ or PAR, with the behavior you'd intuitively expect: everything in a SEQ block was run sequentially, everything in a PAR block could be run in any order, and (if memory serves) was automatically and transparently distributed across whatever set of Transputers it was running on. Neat.
https://thechipletter.substack.com/p/inmos-and-the-transpute...
1. each transputer CPU is fast, with on chip memory and links
2. you can easily wire them up in parallel to get (10,100,1000x) speed up
3. with the Occam language, you can write code in a parallel way
What people heard was:
1. a 10MIPS T414 transputer is a heavily microcoded CISC architecture and thus slower than a comparable RISC CPU. Clocked at 20MHz a MIPS, SPARC CPU will deliver 20MIPS ... but of much more powerful instructions. [various other limitations such as stack of only 3 registers v.s eg MIPS has 32 registers; flat memory model vs. data/instruction caching; log shifter vs. barrel shifter in ALU; microcoded FPU] --- so you already need 1.5-2x transputers to match the competition is speed is your aim ... I think that this was pretty fair - rather an apples vs oranges comparison
2. this device is for teams that building a computing platform (e.g. workstation, graphics machine, supercomputer, etc.) and you have software that is amenable to parallelization ... I think that this was pretty fair too
3. you can't use any existing software since there is no C/Pascal/FORTRAN compiler and Inmos will not support this (so forget UNIX, libraries, drivers, benchmarks, apps) - there was never a path such as a C compiler with Occam-style Channels in a library ... you and your customers will have to rewrite all your code in Occam
In hindsight, it was probably unlucky that the transputer and parallel architectures were launched into the teeth of the CISC vs RISC revolution since it was harder to keep the focus on point (2). Even more telling was that there was no substantive market demand for this (any) parallel microprocessor (a couple of niche systems players like nCube who didn't fancy being hostage to Inmos IP). So we ended up trying to create a market from scratch.
My model for the ultimate failure is that there was an internal battle between the pragmatists who said "we need to have a C compiler and port in a standard OS" (Pete) and the purists who said "any dilution of Occam will make it too hard for users to successfully parallelize their code" (David & Colin). The purists had the CEO's (Iain's) ear - they won the battle and lost the war.
Disclosure: I was US junior product manager for the Transputer launch in 1985
It's a very interesting architecture. Sifting thru the datasheets is daunting stuff.
It is what you get if you think computers need to advance by going parallel, meaning making it far easier to build whole systems out of lots of CPUs arranged in application specific topologies, and taking advantage of VLSI to put all the hardware on one chip to do it. The inspired part was using CSP as the formalism to define how this should work, which is where things like the channels in golang ultimately come from. The transputer has microcoded instructions for interprocess and interprocessor channel i/o.
It happened to walk straight into the RISC revolution, which it definitely is not part of, and so the only commercially successful spin off of it was their formally proven floating point unit which ended up licensed to Sun (and others iirc).
[0] - https://www.xmos.com/
Neuromorphic chips are built essentially the same way. The individual compute units are dog slow and only have tiny scratchpad memories (just like the elementary "SoC's" of a transputer), but you can etch many more of them on any given piece of silicon and they sip power compared to a standard CPU or even GPU, so the total amount of compute is significantly increased.
AFAIK no one ever put multiple transputers in an array in one package because it exposes one of the key flaws of the idea which is if you arrange them in a pipeline but only one of them has a flaw the whole thing is broken. That is a huge part of why the GPU style design has won for massive parallelism.
No and yes. The idea of a SoC is pretty generic and existed in the industry at the time. But the Inmos team had an interesting mix of system and chip designers (some people who designed both) which led to an elevated interest in trying to get more functionality on-chip. E.g. the PLL clock generator, memory controller, on-board serial I/O. The idea that you could sell a custom chip with CPU and some application-specific peripherals onboard also existed. Inmos developed a disk controller transputer (M212) to showcase that concept.
TLDR: basically build a computer by connecting a bunch of small computers with memory and compute together (what we would call a SOC - System on a Chip - today )
The instincts were correct IMHO, the implementation changed a lot over time and we do a similar strategy at different scales.