China planning 1,600-core chips that use an entire wafer

Forgive my ignorance, I know basically nothing but it seems like they are going out, what about going up?

I did a very short search and found an entry on 3D ICs, one of the challenges was heat and I would assume latency but other than those (sizable seemingly) hurdles would 3D IC be a competitor to whole wafers?

How does one structure memory and programs for a whole waver soc? I assume the heat forces the chip let's to go dark in waves?

So memory is shoved to the next and new code, data is preloaded for dark silicone?

Each processor or group of cores has its own memory and cache.

isn't the reason to have smaller chips to increase yields?

It's one of the reasons. It's also the fact that the smaller your chip is, the more chips each wafer can make, and less wastage around the edges.

Think of it as a wafer with lots of SoCs that happen to be interconnected to each other. The smaller the individual SoC, the higher the number of full-function SoCs on the wafer.