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>RV64GC

>C

What is the purpose of including the RISC-V Compressed 16-bit extension set in what is supposed to be a HPC chip? Most embedded/IoT RISC-V implementations include that for obvious reasons but why here?

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If you don't have the C extension then you can't run off the shelf Linux distros such as Fedora, Debian, Ubuntu, Arch and are limited to what you compile yourself e.g. Buildroot / Yocto.

However the actual academic paper says it's RV64G, no C.

The RVV here isn’t compatible with mainstream Linux anyway.

Thanks for the correction Bruce. I was in a rush (never post when you are in a rush, or drunk, or angry) and I was so used to seeing RV64GC that I didn't notice the absence of the 'C'.

the same reasons motivating C still apply at HPC: higher code density means fewer bits wasted representing redundant information, better cache utilization, minimization of memory fetch bandwidth, etc.

basically, every metric derived from code size is happier when you have 20-30% fewer bits representing it.

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