Renesas 32-bit RISC-V CPU

RISC-V is a worldwide royalty free standard ISA, namely in this realm, ISA abstraction using compilers are not worth their cost with their troubles: planned obsolescence from syntax to implementation, not to mention often insane complexity and size (vendor/developer lock-in). It is even more true on types of software on the classic life cycle: 99.99% of coding happens at the "start", then it is honestly "roughly finished" for nearly the "eternity".

But RISC-V compiler support is required for transition and legacy. But those compilers should not be "gcc/clang" (look at tinyc, cproc/qbe, simple-cc/qbe).

If you write 64bits code paths, those could then be re-used very easily from "embedded" to servers through workstations.

Do you realize how amazing that would be compared to the toxic "software" industry we have now?

You can even find a middle ground with very high level languages, with their interpreters written directly in assembly, you know for those slow, trash-able, and/or very dynamic in time types of software: python42, lua, javascript, ruby, perl666, etc.

You don't even need to re-write everything from scratch, you can "hand compile" existing code, or re-factor, comment and document the assembly output (to detach them from their toxic compiler dependency).

For instance, on the "Heavy Thing", one of the devs did hand compile without that much smart (was more brutal than anything else) the zlib (not vectorized), he said they got 15% average more performance, roughly speaking. It is lucky, as we are not supposed to beat an optimizing compiler on the average load of big code paths, if that happens it is anecdotical, or the optimizing compiler is actually trash.

All that said, RISC-V could fail it does not get extremely good implementations (latest silicium process and micro-archs), with all the pertinent software.