I intend to get a chip designed and made through the Google or other chip shuttles. It's all open source hardware and software.
I just want to see it in use at least once, before I age out of the world. It's a bucket list item.
It's deterministic, because it's basically a set of LUTs and latches, which makes it easier to reason about. Yet it's also Turning complete, as a system. It should be useful for the type of compute job you use an FPGA for, but only if you don't care about latency. Everything is pipelined, so there's no fast way to get a single answer.
It should be a very cheap route to petaflops and/or low power, depending on how you optimize the chip. The simplicity of the design give a lot of flexibility to use, unlike routing things to fit in a specific FPGA.
It could offer proveably secure computing, while being power and silicon efficient, because you can literally build a virtual wall around a function and control all access.
Are you getting wins? Or failing?