The Intel 386 processor die: the clock circuit
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Just FYI: the clock "divide by two" graphic has an unlabeled input into the upper-right AND gate.
Do you know around what time repeaters were started to be used for clock trees?
I also wonder about the two phases. Is that still commonly used?
As far as two phases, the lecture says that edge-triggered (rather than two-phase) is most popular (page 16). But I don't know about modern design.
Link: https://web.stanford.edu/class/archive/ee/ee371/ee371.1066/l...
What if you looked at the 186, comparing it with the 8086? It should be interesting considering there is more efficient digital logic (including microcode) and possibly some interesting analog circuits for the embedded I/O...
I've disassembled the microcode[1], it's similar to the 8086 but with some changes:
- No subroutines are used (effective address calculation and most of multiply/divide handled by dedicated logic). CORR is also no longer needed.
- The 'update flags' bit now has a second function: on a jump, it causes the next micro-instruction to always be executed unconditionally (saving one clock cycle in case the jump is taken)
- MOVS / INS / OUTS are optimized, using a special memory-to-memory (or I/O) transfer; the microcode for this has the 'IRQ' bit set. The address isn't loaded into IND for these anymore (tested it with LEA reg,reg) - maybe it's using the DMA controller?
- Slightly different condition codes ("CX not zero" was added for LOOP/JCXZ; "segment prefix is present" for adjusting IP on interrupted string instructions).
- Order of the 4 instructions in each 84-bit row is shuffled around for some reason
[1] see https://news.ycombinator.com/item?id=34334799 and https://forum.vcfed.org/index.php?threads/8088-8086-microcod...
Link: https://web.stanford.edu/class/ee380/Abstracts/ClockingInMic...