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Comment by _a_a_a_ | Hacker News Reader

The alpha only accessed 8-byte aligned mem addresses (originally anyway). The bottom 3 bits were ignored (masked out) on lookups, per the spec, to allow users to stuff juicy extra info into these.

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Do you have a reference on that? This summary of the Alpha AXP <https://danluu.com/dick-sites-alpha-axp-architecture.pdf> states "Normal load or store instructions that specify an unaligned address take a precise data alignment trap to PALcode (which may do the access using two aligned accesses or report a fatal error, depending on the operating system design)"

> Do you have a reference on that?

Yeah, my totally infallible memory.

Thanks for the PDF, nice when somebody provides more than the minimum information. Okay, from the same doc:

  The integer load and store quadword unaligned
  (LDQ_U, STQ_U) instructions ignore the low three
  bits of the byte address and always transfer an
  aligned quadword

So sort of right, if you squint and don't look too closely :-)

(edit: oh, you're the author? Didn't realise. Good stuff)

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