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Comment by cmrdporcupine | Hacker News Reader

yes and no. no or little OS abstraction, but still there's layers in the way, and it's still sequential in places where an FPGA could be parallel, etc.

a Pi etc has a huge advantage in raw clock speed. FPGAs are pretty slow. at least the ones that you and i can afford

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What layers do you mean that would remain?

I wouldn't expect the experience to be identical nor quite as accurate [1], but if audio and input latency could be made indistinguishable between a Raspberry Pi and a Mister FPGA that would already be quite a significant feat :)

[1] FPGA emulation is not intrinsically more accurate, but most Mister cores are considered to be more accurate than popular Retropie cores.

Framebuffer is one such layer. The output from the emulator goes into a framebuffer before being rendered. It's not going to "race the beam" the same way a FGPA'd VIC-II would.

Same with USB input stack, though I guess MiST/Mister has that too.

Same with SID emulation, which would render into audio buffer samples of certain size (and therefore latency), whereas a hardware or FPGA SID could drive the DAC directly.

This is an interesting dichotomy: analogue vs digital - but I think there’s a third leg to it which is DSP. When your floor is a 1 MHz 6502 and you have a DSP running at many many multiples of that, you can mimic analogue circuits almost perfectly, with identical latency, but better reliability, serviceability, and cheaper parts. The key thing to remember here is that the 2040 is more like a DSP emulating the signals than a regular pi emulating the system. Something as simple as a c64 it should be possible to emulate with DSP indistinguishable from discrete circuits.

The key latencies you describe (frame buffer, audio) aren’t really an issue in the DSP scenario. Also, non linear components like the SID are going to be harder to reimplement in discrete circuits and in fact I’d expect DSP would do better.

DSP wins every time in all domains. Problem is you need to have a much more fine-grained knowledge of the physical underpinnings of the system, not just the system itself.

Every modern Xilinx FPGA with enough logic to implement a Commodore 64's functions can more than clock at the 1MHz required. 50MHz-200MHz is reasonable. A $40 Artix A35T can handle this.

Why do you need more?

You don't, for a C64. We weren't talking in this subthread specifically about the C64 but about the broader idea of FPGA vs CPU driven emulation.

When you get into higher spec machines, esp from the 90s, FPGA starts to not be the best choice $$ per clock.

MiSTer is quite successful FPGA in the retrogaming scene though.

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