CacheWarp: A new software fault attack on AMD SEV-ES and SEV-SNP
cachewarpattack.com
cachewarpattack.com
This strikes me as the thing that Raymond Chen calls "being on the other side of this airtight hatchway" [0]. That is, if you've already got control of the Hypervisor then ... you can do anything you want to the guest operating systems. Right?
0: https://devblogs.microsoft.com/oldnewthing/20060508-22/?p=31...
Sadly this means AWS are still the only ones offering this kind of confidential computing without known flaws, and probably only because they don’t have researchers attempting attacks like this on their graviton CPUs
All customers on Nitro get that enhanced confidentiality between their instance and us as a cloud provider, but for customers who want to run workloads that are confidential from themselves, we do also offer AMD SEV based instances as well as our own Nitro Enclaves product.
Expecting that you can trust a computer you've never even seen, let alone one you *know* is a VM with a whole other untrusted OS under it, is a fool's errand.
If you need this level of trust, you should be on-prem. No excuses.
It’s like saying Microsoft never should have tried to make Windows more secure than it was in the XP days.
Stripping away old/unused instructions from the legacy x86 arch.
I would assume though that much of the new security vulnerabilities are not coming from these legacy instructions though. Surely they would be battle tested by now?
So really, it's a combination of things that led to this CVE, and the longer we stay on an old platform the more strange combinations we might find!
According to all documents that have ever been published by either Intel or AMD for x86-64, it is forbidden to have more than one REX prefix in an instruction.
Therefore, the instruction from "icebreak.asm" should have generated an undefined instruction exception.
While in this case the behavior of the bug is extreme, by completely crashing the computer, if there are other Intel or AMD CPUs which just ignore the duplicated REX prefix, without generating the undefined instruction exception, according to their CPU architecture documentation, that is already an extremely severe bug and such lax implementations are very likely to lead to more damaging bugs, like this.
This instruction should have been disabled when virtualization is used and when it is desired that the virtual machines must be protected even against the hypervisor, not only against each other. Even better would be if this instruction would be removed completely. Because it is a privileged instruction, its removal would not affect any user applications.
This is one of the very rare cases when Intel has done the right thing (disabling INVD when it could be used by an attacker), while AMD has not thought about it.
Fortunately, it seems that AMD can fix this oversight with a microcode update.
Eventually something will have to change, and is it less work for Intel to shift to ARM than to strip x86?
Have you, by any chance, looked into the contemporary ARM instruction set? Just the list of base instructions for A-profile with 1-2 instructions per line takes 14 pages. And then there are SIMD&FP Instructions, SVE Instructions, SME Instructions. Oh, and also M-profile, and Thumb / Thumb-2 instructions encodings, and more.
A small glimpse could be made here: https://developer.arm.com/documentation/ddi0602/2023-09/?lan...
The rest of Intel is rotten stumps but the PR department is still a sharp fang.
Cloud is always "someone else's computer", regardless what stupid DRM-ish crap they come up with to try to pretend that it's not. This tech only benefits the rent-seekers who try to distort the concept of ownership.
In other words, this is nothing worth worrying about.