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Comment by tw04 | Hacker News Reader

Correct, microblaze is the name of an architecture AMD owns, and this is compatible with, per the article.

> It allows developers to leverage the open-source RISC-V software ecosystem, is hardware compatible with the classic MicroBlaze processor

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Hardware compatible doesn’t mean very much in this case. It’s a different ISA so you’ll need a different tool chain and recompilation (possibly rewrite given that assembly is very common in deeply embedded processors). It’ll also have different LUT usage, etc.

It means it's designed as a direct drop in replacent for a traditional microblaze ISA code..sure software must be recompiled, but hardware interfaces match what was there before for peripheral access, debug, instruction offload, etc. This makes the transition to using RISC-v much more seamless if you were already using microblaze

What does "hardware compatible" mean here though? It runs on the same FPGA hardware, but has unrelated CPU architecture?

I assume it means it's essentially pin-compatible, like, say, a PCIe GPU upgrade would be. Still needs new software. But has the same HDMI and PCIe and the same low-level protocols.

Soft cores don't have their own pins. I think "hardware compatible" means that it runs on the same FPGAs as microblaze arm with the same toolchain product suite.

"Pins", in this case, means the logical ports used to interface one module within an FPGA to another. Think AMBA bus, clock(s), interrupt lines, etc. An FPGA SOC design that currently throws a bunch of different IPs (modules) together to do... something... could do the same with this core thrown in to replace a (classic) Microblaze with only a resynthesis on the hardware side, and a recompile on the software side.

It has the same interface to the rest of the design -- the buses and control signals etc. You can drop the new RISC-V soft core straight into an existing design using Microblaze and change only the program code.

CPU is just one part. You're probably adding your own coprocessor and whatever other IO to the FPGA. If the CPU uses a different interconnect/protocol design, you'll have to redesign and debug your entire interface which will be very expensive.

Meanwhile, microblaze is a proprietary architecture. AMD puts a few hundred thousand dollars of dev time into it here or there, but most software stacks will have tons of stuff not at all designed for that ISA. If you can switch to RISC-V, you get access to an ecosystem where tons of companies are all pouring multi-millions in every year.

EDIT: a great example is that microBlaze was added to LLVM in 2010, but then removed in 2013 because nobody was free to maintain it.

Now AMD comes along and says you can swap out the CPU ISA to RISC-V without needing any hardware redesigns and then with a simple recompile, you can start using that massive ecosystem instead of spending man-years writing your own stuff which saves your company lots of money.

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