Here's an example:
https://developer.arm.com/documentation/ddi0439/b/Memory-Pro...
More complex designs tend to go for a full-blown MMU, and I wonder if the presence of such a feature would be warranted when you could go for either full-blown process isolation (which afaik is not that expensive on modern CPUs), or just go with static and dynamic checks (basically and if statement that checks if the address is valid, which can be optimized away like 90% of the time, when iterating through known arrays etc.)
The issue with if statements are that the stats/bits branch predictors use are a finite resource. You really need these checks to be inlined as well because otherwise you'll thrash the instruction cache. If it just had some special register with an interrupt, the CPU could just always assume the index is valid for the purposes of speculative execution and branch prediction.