Some observations:
1. Interesting, how fundamentally analog element such as capacitor, find its way into dynamic logic circuits.
2. The article states that asynchronous computers are not made anymore. Is not google TPU asynchronous?
1. Interesting, how fundamentally analog element such as capacitor, find its way into dynamic logic circuits.
2. The article states that asynchronous computers are not made anymore. Is not google TPU asynchronous?
No, the TPU is not async. It has a single main clock. It does work in parallel, but it's still synchronously clocked. As neat as async is, it's truly a paradigm shift that affects nearly everything about your system and most of us can'd think in partial differential equations.
Vonada's engineering maxims: https://twitter.com/kenshirriff/status/1633154548318732289
Vonada's engineering maxims are pretty scary to me- an amateur hobbyist soldering various chips together to build simple projects like "a rotary encoding controlling a binary counter visualized with LEDs". I spend many hours soldering and carefully debugging every individual component, and when I integrate, spend many more hours debugging why something doesn't work. The failures are almost always because I did something dumb, like wiring up VCC and GND backward, I honestly don't know that I'd be able to debug "When all but one wire in a group of wires switch, that one will switch also." in my binary counter's inputs or outputs.
Fortunately for probably most hobby projects you don't have to worry about most of those things.
A lot of those maxims concern failures of the lumped element model.
The lumped element model is a model where all the capacitance occurs in capacitors, all the resistance is in resistors, all the inductance is in inductors, and so on, and wires are zero resistance conductors of current that do not couple magnetically or inductively with anything.
If clock speeds aren't too high, there is enough gap between the highest 0 logic voltage and the lowest 1 logic voltage, wires aren't too long, voltages and currents aren't too high or too low, and you don't do anything like put loops in your wires (other than when you are intentionally trying to make an inductor) the deviations of reality from the lumped element model shouldn't cause any problems.
As you deal with higher frequencies reality starts to noticeably diverge from the lumped element model. You have to start worrying about things like capacitance between leads on your components, inductance between wires, and wires acting like transmission lines.
Keep going up in frequency and you can get to a point where you have to use software that can solve (exactly or numerically) Maxwell's equations for the fields around things and take into account interactions with those fields.
Hobbyist projects can do things that get past where the lumped element model is all you need, such as WiFi or Bluetooth which operate at several GHz, but usually those functions are handled by modules that the hobbyist buys that are (hopefully!) designed by people who know how to deal with high frequencies. E.g., you buy an RF module that does the scary radio stuff, and you control it from a microcontroller that is running an order of magnitude or more slower than the RF module, and whatever inputs and sensors and non-radio outputs you have are probably at least an order of magnitude slower than your microcontroller.
Those non-RF parts of the project are likely to be well in the realm where lumped element works.
Most of the rest of the maxims concern things that are mostly going to be a problem for big projects where you might be worrying about things like synchronizing things across dozens of subsystems and with very tight tolerances.
The intention of the maxim is to design the system in a such way that the all-but-one situation never happens. And if it has to happen then you need to be sure that the “analog stuff” and “black magic” like power supply decoupling and ground return paths is handled correctly.
And in fact the binary counter is perfect example for that. You can design that as an ripple counter or synchronous counter. Ripple counter is simpler and does not suffer from these kind of issues because the switching ripples through the bits LSB to HSB, which also means that there is a period of time before the output stabilizes where it is simply wrong, which is the main drawback of that design.
In logic circuits class they don't talk about areal constraints, but IC designers have to think about such things.
This technique is referred to as "dynamic logic". It was common in the early days of MOS ICs -- for instance, it was used extensively in the original 6502 -- and still finds some usage in high-performance ICs.
Maybe now it would be worth revisiting, especially since we can throw so much computer power at validation!
https://relaysbc.sourceforge.net/circuits.html#:~:text=Low%2...