16-bit Serial Homebrew CPU
jiristepanovsky.cz
jiristepanovsky.cz
I would suggest in the spirit of 1-bit computing that instead of doing 8-bit music, you could instead output 1-bit oversampled Delta Sigma Modulated audio.
Comparisons like this have always seemed a bit unnatural, since you can get an entire x86 PC on a single chip, and things like calculators, cheap media players, and various toys also use nothing more than one COB.
Also, I'd say that this machine also nicely demonstrates that a CPU is a state machine - a rather large one.
So the only reasonable way to express the complexity of a CPU is by the total numbers of gates and of flip-flops or latches, regardless how they are grouped into monolithic ICs.
They didn't come out until 1975, the Intel 8080 and Motorola 6800 were well established on the market by then, the MOS 6502 had just landed and the Zilog z80 was just around the corner. If a designer cared about chip count or cost, they used one of those.
The AMD 2900 family squarely targeted at high-performance mini-computers. Not only could you chain 4bit slices together to make a 16 or 32bit ALU, but they could run at significantly higher clock speeds than both a microprocessor or a CPU made out of pure TTL logic.
The 2901 ALUs might save you some TTL chips, but those sequencer chips require so much support logic and microcode ROMs that your new design might actually exceed the chip count of whatever TTL-only CPU it's replacing. But... the new CPU will be faster and much more flexible thanks to the microcode.
The AMD 2900 family allowed minicomputer designs to stay relevant for a few extra years, but only until larger single-chip CPUs like the Intel 8086 and Motorola 68000 hit the market.
Complex bipolar ICs like AMD 2900 competed only with simpler TTL ICs, for the implementation of computers like PDP-11 variants and their clones.
For this purpose, they allowed a great reduction in the number of IC packages and in the size of the PCBs.
If it is chosen to implement the CPU control as microprogrammed instead of hardwired, the same memories or PLAs are needed, regardless if you make the sequencer with smaller TTL parts or with one IC from the 2900 family. A hardwired controller, unless it uses a PLA, will use more ICs than a microprogrammed one, where the memory replaces a large number of gates.
If you do not use one 2901 or 2903 RALU circuit, then you must use one 74181 ALU with several flip-flop packages and with multiplexers, which unavoidably increases the number of ICs.
If you do not want to use one 4-bit ALU or adder, but you want to use only one single-bit adder for serial additions, that does not reduce the number of TTL circuits, but it increases them.
The minimum number of TTL circuits is achieved for a CPU whose execution units are 4-bit wide, unless it is a CPU that cannot do arithmetic operations, but only logical operations, like many programmable automata that were popular before microprocessors became widespread.
The linked project implements an "1-bit ALU + sequencing + microcode" in a single PROM and just 3 TTL logic ICs (it's absolutely fair to use a PROM, because the 2900 designs all used PROMs too)
Sure, it also used serial memory ICs that didn't exist in the 70s, but it wouldn't take that much TTL logic to implement the three address registers (program counter, write pointer, read pointer) and other memory support logic. Your 2900 family design also needs memory support logic too, and at least one address register.
I just don't think you can beat that chip count with a microcoded AMD 2900 family design, and it's going to be significantly cheaper. In many ways it's an extremely simplified version of the exact same design, with the key parts of the ALU and Sequencer rolled into the microcode PROM chip, and every other feature discarded.
Sure, the microcoded 2900 based design might result in a more capable design for not that many extra chips, but the goal here is absolute lowest IC count.
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Now, if you are willing to think outside of the proposed designs in AMDs 2900 family design handbook, then maybe you improve on things by misusing chips.
For example. 2910 is meant to be a 12 bit microcode sequencer, but I think it could be abused in the above design to implement the program counter plus read/write address registers in a single chip. If we also used a second one for its intended purpose, we should be able to the three TTL logic chips used for sequencing.
I haven't fully thought though the design, but I think this makes it possible to do a 1bit CPU in just five chips. 8K word 16bit PROM, two AMD 2910 sequencers, one TLL chip for clock generation, and a 4K 1 bit wide SRAM chip for program/data storage.
The ALU is just lookup tables in the PROM, so it should be possible to implement a two bit or three bit wide ALU by moving to a larger PROM chip and wider SRAM. Four bits might be a stretch as I want to use part of the microcode address as ALU input registers, but you could always add more PROMs and 2910s to make the whole design wider.
The interesting question (at least to me) is how simple a CPU could have been built using TTL in, say, 1970. How much could minicomputers have been simplified? The retro low-chip-count projects generally use a huge ROM to implement logic or microcode, which wouldn't have worked historically.
That aside, the 16-bit serial CPU is an interesting project. Serial computers don't get much attention these days, but are important historically. Not to mention that the 8086 is derived from the serial Datapoint 2200 processor via the 8008.
Serial designs were somewhat common in the '50s but it seems they had fallen out of favour by the 70s, except when engineers needed something very low end, like a terminal or calculator.
Probably because core memory is inherently parallel and had become dominant throughout the 60s, killing off drum memory and acoustic delay line memory.
With the rise of silicon memory, maybe a serial CPU would have worked well for a cheap-but-powerful minicomputer in the early 70s.
Is it enough to be a programmable state machine, or does it really need an ALU?
Or should the definition require a certain type of programmability, with an instruction pointer and conditional flow control?
It reminds me of David Conroy's FPGA emulation of the DEC alpha: http://fpgaretrocomputing.org/
The CPU itself isn't so bad. Heck a relay CPU is should be quite doable to build, as evidenced by the various people that have built them. It's mostly just laborious.
The problem is memory.
There's a reason for all the seemingly whacky ideas to implement memory back in the early days, like the torsion wire[1] delay line[2] which is pretty much like banging on a taut rope and recording the pulses that arrive at the other end.
But it's quite tough to get any real density from what I can tell, without advanced manufacturing.
That $1 8 pin marvel itself can be used to output VGA video:
https://hackaday.com/2011/08/31/vga-video-output-with-an-att...