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Comment by londons_explore | Hacker News Reader

The most impressive thing to me is that Linux allows data piped from one program to another to stay entirely in L2 cache and not hit main memory.

To me, that is amazing systems architectural design - so many different parts of a regular linux kernel all working together to let this fastpath happen.

Would such a thing be possible on Mac OSX's Mach ports or Windows's Named Pipes?

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If a CPU's caches are physically tagged and both process's page tables share the same backing physical page then the CPU will let the cache contents be used by either process as long as the OS doesn't explicitly flush/invalidate cache on context switch.

The major cost of two processes coordinating shared data over two threads is TLB invalidation on a context switch.

I assume this is what the author meant by “page table contention” as a bottleneck: Without TLB invalidation there would be no need for either process/thread to ever touch page tables in a scenario like this.

It's unrelated to TLB; page table contention is related to associative caches where you can have two distinct addresses map to the same cache set and cause false cache miss or exhaust the cache set and cause repeated fill from memory.

TLB has to be flushed for process context switch on x86 regardless of Windows/Linux - but modern systems typically allow it to be selectively flushed (the system can elect to not flush tlb for the shared mappings that exist in both processes).

TLB miss vs Cache miss are an order of magnitude apart, and multiple orders if the corresponding pte itself is resident in dcache.

What’s the mechanism for this? AFAIK one of the main motivations for the recent heated discussions on PostgreSQL adopting a threaded model would be eliminating TLB flushes in high-context-switch environments. Can Linux already preserve their (massive) shared mappings?

ASID (Address Space ID) or as Intel calls it PCID (Process Context ID).

The OS juggles these based on what processes are resident on CPU and the various active mappings then uses INVPCID[0] during a context switch.

[0]: https://www.felixcloutier.com/x86/invpcid

This is one of the many reasons that the entire HFT world runs on Linux.

Do they also use assembler in HFT?

Custom hardware, custom drivers, custom UDP stack.

It's not just the algo's, it's very much the latency.

( eg: https://www.velvetech.com/blog/fpga-in-high-frequency-tradin... )

For speed, its mostly FPGAs. You can put them directly at the demarc between you and the exchange.

They use custom ASICs too.

  if(((i%3)||(i%5))== 0)
     buy_0_day_to_expiry_options()

I may backtest this over the weekend just in case it has some alpha :)

But 0dte options on SPX are available for each day of the week now!

    if (is_trading_day())
        buy_0_day_to_expiry_options()

I've heard of some windows HFT systems, tho I'm sure that's suboptimal.

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