Scaled integers give you an instant and very significant boost in performance. And, what's best, in most cases the error is far smaller than 1%. I've done tons of real-time image processing work on FPGA's where you almost never use floating point hardware due to how resource intensive (and slow) it is.

Another construct that is extremely fast, cheap and can even represent nonlinear and discontinous relationships is the good-old lookup table. In hardware (FPGA) you get one result per clock cycle.

Now, of course, if you can deal with the error and name the tune with just a handful of transistors it could be a good tool to have.

It might make more sense to have a hybrid. Build a CPU that includes a traditional FPU as well as a "physics-based" FPU. Then the programmer can decide which way to go by trading off between accuracy and deterministic behavior against speed and errors.