Hacker News Reader

Comment by CamperBob2 | Hacker News Reader

Density. Storing a bit in DRAM requires one capacitor, whose dielectric is simply the gate insulation layer on a transistor. Storing a bit in SRAM takes at least two complete transistors.

View on HN

That's precisely the answer I didn't find convincing for the reasons I mentioned. If it were that simple, I strongly suspect we would have SRAM-DIMMs and DRAM-DIMMs duking it out in the marketplace in analogy to SSD vs HDD a decade ago.

> one capacitor, whose dielectric is simply the gate insulation

Every DRAM cell depiction I've seen in the last ~5 years has had a gigantic trench capacitor. Are those not in production?

Density isn't the only issue - power usage is also a contributing factor. Because SRAM uses more transistors per bit, leakage of the transistors in large arrays is a significant source of power draw. In DRAM leakage of the single transistor per cell can be compensated for by adjusting the refresh rate.

MRAM and other persistent memory technologies might be used someday, but there's a lot of R&D work to get them to the same level of price and performance as DRAM. It's sad that Intel gave up prematurely (imho) on Optane.

and it's not like SRAM isn't used in modern computers -- it's baked directly into the silicon of your CPU to serve as register banks and cache

Ah, that makes sense! It's too bad that CMOS becomes leaky at small sizes.

Yeah, too bad about Optane, but CXL gives me hope that the next decade will bring more action in this space.

Reply on news.ycombinator.com