Porting the Slint UI Toolkit to a Microcontroller with 264K RAM
slint-ui.com
slint-ui.com
Feel free to hit me up for pointers.
Video proof: https://photos.app.goo.gl/zZiLnDNLQs2omBXz5
Of course a snappy interface is always more important than visual flair, but I imagine this is more a tech demo than anything else.
Which is why they often also offer 8 bit serial interface. I guess one can use it with the PIO on rp2040.
Edit: whoops it's only 320x240. Not sure how fast are they are running it.
https://twitter.com/charlesstrahan/status/163002622435647488...
Now, admittedly, this is 600 MHz beast (the NXP i.MX RT1062). But I’d like to think it’s still impressive for the hardware involved.
As mentioned in the Twitter thread, to eke out the performance I had to implement an 8-bit parallel bus using FlexIO along with DMA (all written in Rust) — but with that implemented, the display is pretty zippy.
Getting good throughput requires DMA, and Band also paid the price and dedicated tons of local SRAM for the frame buffer. A local framebuffer that can be read from is needed for antialiased fonts and alpha blending, not to mention things like screen fades!
Band also had real true type fonts, and ran at 30FPS[1] with vsync!
I did a write-up of how at https://meanderingthoughts.hashnode.dev/cooperative-multitas...
[1] the 30fps cap was due to bandwidth to the display controller, uncapped the UI could run internally at around 100fps if it wasn't doing loads of text rendering.
> At launch, the Microsoft Band dropped fewer frames than an Apple Watch
> if any module took more than 2ms before it returned, a crash dump was created and the code was investigated and optimized.
If only Microsoft cared even half as much about the UI in its other products. Visual Studio still hangs up the main thread for many seconds.
(side side note: touch input/output latency is a field Microsoft is actually remarkably good at, I'm guessing because they did some research on how much it matters decades ago. if only they had done some research about how glaring UX defects impair the over all usage of a product ...)
i get displays are not the realm of single digit cents 4 bitters or something. but i can think of other mcus more constrained w probably still enough flash and fast enough SPI bus and dma that would be a much better showing.
i guess i feel the pico is overkill, but at any rate this is mostly unfair because its not the toolkits target market in the first place
I feel people that don't usually work mit MCUs think a Pico2040 or ESP32 is a crazy constrained environment, when those are really rather luxurious. I'm not sure how much it matters - maybe its like complaining about Elektron while Slack (deservedly) succeeds.
Meanwhile we have this laggy mess...
This is a slow SPI bus with the cpu needing to push W x H x BPP pixels and with a 320x240 16bpp that comes out to 9 million bytes/sec for 60fps or 4.5 million for 30 fps. Cortex M0 I believe has 4 cycles for load and store, so even if you had a perfect parallel 16 bit bus where you could do 1 load + 1 store to send a pixel, that comes out to a best case ~80 fps @ 100MHz with 100% cpu utilization (i.e you could do nothing else on that cpu, not even serve interrupts). Another core wont help much because it shares the memory bus, and fill rate is the bottleneck here.
There's a good reason why we have dedicated chips for pushing framebuffer -> lcd physical pixels even back in the 80s.
Only if it needs to update the entire screen for every frame, which it probably doesn't.
> Cortex M0 I believe has 4 cycles for load and store, so even if you had a perfect parallel 16 bit bus where you could do 1 load + 1 store to send a pixel
DMA can shovel data from RAM straight into the SPI peripheral with no CPU involvement beyond the initial setup (which is simple).
> Another core wont help much because it shares the memory bus, and fill rate is the bottleneck here.
Depends on CPU, some (RP2040 for example) have segmented memory which means you can just have one core working on the graphics, and dedicate segment to DMA
Here’s Slint running on my own backend for the Teensy MicroMod (has an NXP i.MX RT1062 processor) using DMA and an 8-bit parallel bus using FlexIO:
https://twitter.com/charlesstrahan/status/163002622435647488...
I’d say that’s fairly smooth.