The Rise of the Chiplet

> Interposers.

Interposers are just one way of packaging MCM designs. AMD's RX 7900 series doesn't use a silicon interposer, it's still an (early) MCM design (although of course it's only pulling out memory controllers and cache, not multi-GCD). And technically since it's already a fiberglass package, there's no reason you can't stick things right onto a PCB instead, it's just a matter of convenience for partners placing/routing one thing instead of 7 things.

https://www.techpowerup.com/301071/amd-explains-the-economic...

Infinity Fanout integration is a different type of MCM integration with some of its own upsides (cost) and downsides (higher power, less bumpout). There's also bridges, and actual 3D stacks of multiple compute dies (or 2.5D with memory/etc) that don't use interposers at all.

https://semiengineering.com/using-silicon-bridges-in-package...

All of these are technically MCM - MCM is any sort of multi-chip package. MCM also really does include things like Core2Quad, Pentium-D, Crystalwell, Xenos, and various IBM modules in the 70s and 80s. The idea has been kicking around for a long time and "multi-chip module" refers to all of them collectively, not just interposer-based CPUs.

https://en.wikipedia.org/wiki/Multi-chip_module

And while yes, stacking and direct-bonding are great and lower power requirements a lot... there are still dies with stacking and no interposer! Ryzen x3d chips are a great example, v-cache is a MCM but there's no interposer there. And technically Ryzen itself (without v-cache) is also MCM too and still sees large benefits there too.

I think another important distinction between today's chiplet CPUs and the Pentium D/Core 2 Quad is that those early parts were still using a traditional shared front side bus connecting CPU cores to the memory controller/northbridge residing on the motherboard. So those MCMs were functionally equivalent to a dual-socket system even from a performance perspective, but harder to cool.

AMD's chiplet-based CPUs gain some real benefits from using faster or lower-power short-range links that would not work between separate CPU sockets, and more advanced packaging using interposers or bridges further reduce the power and performance costs of communication between chiplets. These benefits mattered even for AMD's early chiplet-based CPUs that were homogeneous rather than using a mix of specialized dies.

This is about as meaningful a distinction as the marketing copy that defined the GeForce as "the world's first graphics processing unit (CPU)" by creating a definition that matched their exact specs while definitionally excluding its competitors. You have to do 10 million polys/sec on a single monolithic chip or it's not a real GPU guys!!!! Voodoo doesn't count because it's not monolithic!

> ICs that perform only some of the functions, or "Intellectual Property Blocks" ("IP Blocks"), of a component in a computer.

Well, a Pentium D or Core2 Quad didn't have a northbridge onboard, so each chiplet only performed "some of the functions" of a CPU.

Which functions are the important ones that count? Well obviously the ones that AMD did, and not the ones that Intel did, of course. I mean you can't really have a CPU without memory controller so... kind of an important one. One might describe that northbridge as... an IO die. Just not one that lives on the package, because that's not how it was done at the time (monolithic CPUs had external northbridges too).

And obviously that's changed over time, components of the CPU itself go through the same internalize-and-integrate/externalize-and-disambiguate lifecycle as has been well-remarked previously in other aspects of computer design. On-package northbridges aren't something unique to MCM either.

The parent comment that ascribes it to viral marketing and clever rebranding is correct. Everything that is old is new again - the IO die is just a northbridge-as-a-chiplet and the CCDs are pretty similar to pentium-d or core2quad core chiplets. Just branded.

There is very much a lesson to be learned here as far as technical marketing - how would customers know how awesome your thing is if you don't give it a special name to tell them? It's a Graphics Processing Unit, of course it's better than the competition's Boring Old Junk, it's got way more quadroflops and kilopixels! It's not a L3 cache, dad, it's AMD GamerCache, or Radeon Infinity Cache, it's totally different! It's not memory paging/swapping, it's HBCC! It's not PCIe Resizeable BAR, it's Smart Access Memory!

If you don't give it a brand name then people won't know how awesome it is and how lame your competition is for not having your exact implementation of the idea. Or even if they do, hey, yours is the one with the brandname. You can't be an ultrabook, that's our trademark, you're just some underpowered thin-n-light laptop.

https://www.vortez.net/news_story/amd_gamecache_canny_market...

https://www.amd.com/system/files/documents/infinity-cache-te...

https://itigic.com/what-is-amd-hbcc-features-and-how-it-work...

https://www.gpumag.com/smart-access-memory/

It's not that AMD didn't make any improvements - technology marches onwards and they built a good system. It's just not really a difference in kind in the sense you can draw some particular brightline and say "well this is MCM and this isn't"... these ideas have been kicking around for a long time and it's not AMD who invented them, even if they improved them.

Attempts to do so fall into the same trap as "it's only a GPU if it's a GeForce 256 descendant", because you end up with a definition specifically drawn to include the things you like and exclude the things you don't, rather than technically coherent distinctions. It's still the same general idea even if Intel's implementations weren't commercially successful (although I think Core2Quad was pretty successful overall).

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And while I'm picking on NVIDIA with the "GPU" marketing thing... it's also not like NVIDIA didn't improve the state of the art too! Having 2D and 3D in the same chip was way more convenient overall, the "GPU" was quite revolutionary. But that's also pretty much the baseline expectation, a generationally newer product should be significantly better and will likely be conceived differently to match the nodes and the tech of the time. The reason AMD went super heavy on caches on all their 7nm products (CPU and GPU) was to take advantage of TSMC's SRAM density... and they were well-placed with a good architecture to do that too! But a lot of these things are just "products of their own time" in some ways, not having L3 is common on pre-TSMC N7 GPUs not because nobody had thought of L3 cache before, but rather because SRAM isn't a very efficient use of die area on older nodes and it wasn't a good engineering tradeoff. And then it was.

Like other kinds of alt-history hypotheticals, people tend to underweight the "overall forces of the times" that would have tended to push things in the same direction even if some specific decision had been made differently or whatever. Someone else would have thought of "wow let's use this high-density SRAM that N7 gives us and throw a big cache on our product".

Also the USG is making a big push to reshore chip manufacturing, especially in more future-facing areas such as chiplets.