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Isn't this problem solved with a chiplet design like AMD does? Just manufacture the SRAM using an older and cheaper node and keep the logic in the most advanced node.

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Eventually you kick all SRAM out of the compute die and the Levels start meaning Layers.

That's what they did on their GPUs with HBM.

HBM was a bit of the opposite. That was off-chip DRAM being brought very close to the GPU.

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