Loongson’s LSX and LASX Vector Extensions | Hacker News Reader

Loongson’s LSX and LASX Vector Extensions

chipsandcheese.com

87 pointsingve19 comments

Wow I have not heard "Loongson" for about 15+ years. I had a job at a startup that was trying to make "thick client" machines (kiosks, library computers, schools, prisons, call centers) etc. Using Loongson hardware running debian-live ("casper"), MIPSEL variety. My job was to cook up custom Linux images to boot from flash memory on Loongson prototypes, so we could show prospective customers "hey, we can stamp out these computers that will do only what you want and nothing more.

At the time, the internet had a ton of Macromedia (Adobe) "Flash" for animations, video playing etc, and there was no capable MIPS "player" for flash which was a major concern towards our go-to-market strategy.

Now Flash is history and most people are surfing the web on ARM chips on their phones.. time moves quickly

15 years isn't quick

It is when you are having fun. For me, it feels like yesterday.

It looks like yet-another-MIPS-clone, so the performance and other characteristics are not too surprising, except for the truly undefined register values; I suspect those might be artifacts of internal bus layout and pipelining.

Also worth noting that x86 has 64-bit vector registers too --- the original MMX registers, which are likewise aliased to its x87 FP registers.

When an instruction has unpredictable effects, especially on a large scale like this, it seems very likely that internal microarchitectural state is leaking, and the result could easily be a massive security vulnerability.

Loongson are working on a Debian port for their CPUs:

https://wiki.debian.org/LoongArch https://wiki.debian.org/Ports/loong64

Is this project still relevant with the advent of RISC-V? Can't the Chinese focus their efforts on RISC-V instead? Is there some reason Loongson is still being actively developed?

They are putting a lot of focus on RISC-V especially Alibaba T-head design studio. If i'm not mistaken Loongson's has instructions in it to emulate RISC-V faster.

I read somewhere that RISC-V is very MIPS-inspired. If that's the case, it'd make a lot of sense to share instructions or facilitate emulation.

As it happens China is a big country with many independent companies in this industry. Some work on Risc-V, Loongson seems to do its own thing, though it is related.

Feels like a shotgun approach. They have x86-64 (Zhaoxin), RISC-V (Xiangshan, Alibaba), MIPS -> Loongarch (Loongson), and aarch64 (Phytium). My guess is the central government is trying to build domestic chips by throwing piles of money at anyone who says they can make one.

Result: a pile of different architectures running different instruction sets, none of which come close to being a high performance design.

> However, Loongnix provides a LSX/LASX capable toolchain. That means we can discover LSX and LASX instructions and play around with them.

Where does one find this toolchain and the hardware for it?

Toolchain wise, at least some of their stuff has been upstreamed into LLVM. I'm not sure if the vector extensions mentioned here have been upstreamed however.

[0] https://discourse.llvm.org/t/rfc-add-a-new-backend-called-lo... [1] https://discourse.llvm.org/t/rfc-promoting-the-loongarch-bac...

I've actually ordered a 3A5000 cpu and mb combo off aliexpress to get something setup for doing software testing. I'm not sure if it's the best place to get things but it's very easy to find at least.

I'd also recommend checking out https://blog.xen0n.name/en/posts/tinkering/loongarch-faq/#im... if you're planning to seriously look at getting something to play with, and avoid the older Loongson systems and they're pure MIPS and not the new LoongArch64 that's being talked about in the article here on HN or the linked page from me. The LoongArch64 is basically MIPS instructions but using RISC-V instruction encoding and some changed semantics (things like getting rid of the MIPS delay slots and things) to make for a more modern design on the silicon.

I've not yet received my board (should finish in customs this week based on tracking numbers) but do plan to document what I run into when getting something setup.

"Unlike SSE and AVX2, LSX and LASX are not publicly documented."

my interest has immediately gone to zero.

It is an in development ISA, it makes sense for these kinds of new features to not yet be documented

I see them in their official documentation:

https://loongson.github.io/LoongArch-Documentation/LoongArch...

They tell you how to detect support but don't describe the instructions or execution environment (registers, etc).

Is LASX pronounced as Lasix?

(1) https://en.wikipedia.org/wiki/Lasix

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