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Comment by ChuckMcM | Hacker News Reader

This has been one of the most interesting things to me (as an SDR dilettante :-)) is how quickly this technology has moved. When I was first getting into SDR more seriously "Zero IF" was the big thing. But it took me a long time (probably longer than it should have) to differentiate between the three architectures (heterodyne, zero-if, and direct-rf).

The ADI9801 and the Xilinx RF-SOC are multi-gigasample per second converters and so you can (in theory) just grab all the spectrum and then pull out any signals you want with DSP. Works great on paper but wow is it difficult to design hardware and pipelines for that stuff.

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> The ADI9801 and the Xilinx RF-SOC are multi-gigasample per second converters and so you can (in theory) just grab all the spectrum and then pull out any signals you want with DSP. Works great on paper but wow is it difficult to design hardware and pipelines for that stuff.

What is the dynamic range on these converters? I suspect that if you want to pull out a signal that is 120dB below the strongest signal in the spectrum, you're going to have a bad time.

120dB at 4GS/s no problem, spec is on the front page of the data sheet.

https://www.analog.com/media/en/technical-documentation/data...

Edit: In case you don't know what to look for,

https://www.analog.com/en/technical-articles/noise-spectral-...

There was a transposition in the PN in your original comment, so I couldn't find it.

I am not a EE, but that's a 12 bit ADC, so if you aren't using the receive equalization feature, aren't you limited to about 72dB just due to quantization?

Read the linked article.

That makes sense; the total noise power is spread across the entire Nyquist bandwidth of the ADC, which is 2GHz in this case. I haven't ever worked with ADCs with such a large ratio of sampling rate to band-of-interest before, so it was mildly surprising to see 10s of dB of processing gain.

Yep, you got it.

After watching the video, the main limitation is the compute bandwidth and the bottleneck between SDR and the compute platform.

The 9081 will happily pass you 4 billion 16 bit samples per second. Like the video says: that’s sixteen lanes of PCIe 3.0!

The selective DDCs on the AD9081 are a big deal. Pretty clear line to ELINT applications: numerically resample to a few bands of interest for comms or radar, and you can use a 9081 for direction finding for 8 bands with 20MHz resolution.

Even at $2k per chip, a rack full of them is still a bargain compared to an EA-18.

ADI does some truly impressive A/D engineering.

Agreed, and Digikey has parts in stock for just $2,625.30 each :-). (well for the 4 channel ones).

Although it also explains why we've had a kind of "rush" on GHz quad channel oscilloscopes (Keysight, Tektronix, R&S, and even Rigol all have updated offerings that probably use this chip).

I'd love to play with one but I am not going to fork over $44K for an evaluation board.

[1] https://www.digikey.com/en/products/detail/analog-devices-in...

Evaluation, shmevaluation. That's what dead-bug construction is for.

Okay I chuckled at that, trying to imagine doing dead-bug construction with 28 GBps differential pairs on a BGA package is not something I want to take on :-)

Did you know Rigol offers a quad channel 5GHz scope now?

https://www.tequipment.net/Rigol/DS70504/Digital-Oscilloscop...

Still sets you back the price of a new car, but since Rigol is working hard to compete on price, it’s a new Corolla instead of a new S Series.

I’ve never thought about how it’s datapath ICs enabling this little rush on cheaper GHz scopes. I’d be a bit surprised if Rigol was using ADI - I wouldn’t expect them to have the volume to buy ADI parts and get them supported. (I’d also wager there’s likely some export controls on chips like this guy.)

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