RISC-V SBC VisionFive 2 Officially Shipped
starfivetech.com
starfivetech.com
StarFive Tech. have been upstreaming on kernel, OpenSBI and U-Boot from several weeks now. Of course this is still weeks/months away (if not more, for all the features) from landing in stable releases. Even more for distributions to pick those up.
There are several desktop images but various issues reported from no display output, to only 1080p supported. To this image or that one working.
Important note, the later images require an updated to uboot and SPL, either with the bootrom or a serial connection.
It's a mess at the moment!
> It's a mess at the moment!
from my cursory testing it seems gui performance is much better than hifive unmatched (window manager, apps, web browser)
[edit] add geekbench
https://browser.geekbench.com/v5/cpu/compare/17159543?baseli...
Any idea why StarFive went with this choice for an SBC? I remember POWER7 also having 4 SMT, but it felt right for a superscalar multi-core CPU.
The reason why this SoC is faster than HiFive Unmatched seems to be down to architectural improvements.
The one in JH7110 is the 2021Q1 version, AIUI.
Besides faster, it also added B extension.
$ cat /proc/cpuinfo processor : 0 hart : 2 isa : rv64imafdc mmu : sv39 uarch : sifive,u74-mc
I do not know why I thought it did. Possibly as U74-MC[0] supports that option.
Interestingly, I also took a look at RVA22[1], and found it requires Zbb but not the whole B.
Your /proc/cpuinfo isn't listing Z* extensions. Maybe lscpu output would be more detailed?
0. https://www.sifive.com/cores/u74-mc
1. https://github.com/riscv/riscv-profiles/blob/main/profiles.a...
OpenSBI says:
Boot HART Base ISA : rv64imafdcbx
I have been meaning to make use of it but so far just as a vnc server which works well loading XFCE on the minimal desktop image.
Edit: can see below that it is indeed a quad core... Embarrassed I took an internet strangers off the cuff remark as gospel
Quad-core 64-bit RISC-V SiFive U74 (RV64GC) processor @ up to 1.5 GHz with 32KB D-Cache, 32KB I-cache
Single-core 64-bit RISC-V SiFive S7 (RV64IMAC) monitor core with 16KB I-cache, 8KB DTIM
Single-core 32-bit RISC-V SiFive E24 (RV32IMFC) real-time control core with 16KB I-cache
I believe by the standard boot process, opensbi would jump into uefi instead of u-boot.
SiFive does provide docs for the core complex (processors, cache, irq controller, etc), but that doesn't cover any SoC-specific peripherals.
I just find the "all you need is Linux patches" approach annoying. There are BSD variants and little experimental and homebrew OSes out there that would be fun to run on a capable RISC-V SBC and even if you are using Linux it's still nice to have some documentation to refer to beyond whatever the silicon vendor implemented in various driver patches.
We have been spoiled with Raspberry Pi the past few years prior to the shortages. I wish another vendor could get close to Pi's position to give more competition in terms of support and documentation.
Yeah, but with an OS and MMU you don't get to just write to a port or other registers. The plumbing has to be in place.
This board has so much going for it. The native M.2 is a highly desireable feature. The only knock is the lack of wifi/bluetooth which can at least be solved with a dongle.
I just got an Edge 2. Damn so much faster than my pi4. The downside is I think it’s hard/impossible to get an OS on it other than the ones they provide. ubuntu/android.
The SoC docs indicate: • 512 × 32-bit (2 KB) of OTP for key data on-die storage
But, that sounds like it's for the likes of secureboot.
If you just want some kind of trusted key storage/signing inside a secure enclave style design, to keep things secure from the OS/hypervisor, something like Keystone may be more your speed. It largely just re-uses the existing M-mode privilege level to enforce separation from the OS and userspace stack. It isn't 1-to-1 with Worldguard, but it's a start, and in theory you can "just" patch the SBI implementation to support it: http://docs.keystone-enclave.org/en/latest/Getting-Started/H...
Anything implemented today is probably going to be missing some key features of a complete stack, but the parts are all mostly there, and still moving.
Just go here and buy one instead: https://www.waveshare.com/visionfive2.htm?sku=23875
Most projects turned out ARM based after I bought it.
The site is not working, any price of this board? What's its market, e.g. ip camera? I'm still interested in lower cost ready to go risc-v boards.
the fan on unmatched was screaming loud, i bought a quiet one and it worked well.
Please let me know if you’re interested in selling me yours.
https://browser.geekbench.com/v5/cpu/compare/17159543?baseli...
if so, i wonder how much that contributes to the difference...?
Unfortunately, there's no drivers in the current images, and it'll take time to have proper open drivers and integration with common APIs such as vdpau.
Of course, there's a lot of software factors holding it back, such as quality or lack of drivers.
Benchmarks will be worth re-running in a few months, once some level of ecosystem is in place.
BUT the GPU is apparently better which would make this THE SBC.
I will test my 3D MMO engine and give exactly what is what once I receive mine, should be a couple of days.
The Raspberry GPU has a serious cache problem, it can't render a triangle at 60FPS in 1080p!!!
But 100 non-instanced animated characters (each with a unique weapon in hand) at 60FPS and low res (800x600).
Jetson (1/2 Nintendo Switch GPU) does 300 at 60 FPS in 1080p.
If the Visionfive 2 is either:
- 100+ at 60 FPS and 1080p
- 200+ at 60 FPS and 800x600
More like bad than mad.
This SoC is far more efficient, using just 4.4w on full load and achieving some 80% of rpi4's cpu performance at a much lower power, with no need for a heatsink.
Not going to debate the gflops/w yet, but Raspberry 4 cores are also around 1W each and they kick ass compared to even M1 (much worse OFC, but per $/openess they still win imo)
The reality is that it draws around 10w more often than not.
You will need a heatsink on the Visionfive if the GPU does what I hope it does.
The Raspberry 4 GPU is only 1W vs. 5W on the Jetson Nano!
I'm hoping for a 2-3W GPU on the Visionfive and then you'll need a heatsink for MMO gameplay no question about it.
Longevity is now crucial as hardware peaks, heat kills electronics slowly but oh so surely!
Edit: Do you have a URL for those 3.xW and 4.4W claims... Then I think we wont see 100+ but cache can still be larger so you can have 100 at 1080p and that is enough for mainsteam adoption and replacing all other computers (Switch, PS4, XBOX, phones and pads etc.)!
The future belong to those that compile!
They also give a lower figure that's 3.x W for full load with the GPU off.
It won't need a heatsink, because with its power draw it won't get above 70C even on full load, while the chip is built for industrial temperature range in operation.
For longevity 60C is better. I'm talking multiple decades at constant permanent full blast here.
The interesting part goes:
>As for power consumption, JH7110 is separated into 8 independent power domains. CPU frequency can be configured through software. To achieve a balanced PPA, customers can set the most optimum SoC frequency based on their application scenarios and performance requirements. In sleep mode, the static power consumption of JH7110 is 120 mW. When working on an SBC, with all the main modules under full load, the dynamic power consumption of JH7110 is 4,100 mW. In the application scenarios of soft routers and NAS, where you don’t need GPU and video processing, but only require the dual Ethernet port operation, you can configure the modules on/off through software. And the actual power consumption decreases to 3,300 mW.
So, to summarize:
* 120mW when completely idle.
* 4100mW on full load.
* 3300mW on full load w/o GPU or video processing modules.
This is, I have to say, crazy good relative to rpi4.
>For longevity 60C is better. I'm talking multiple decades at constant permanent full blast here.
Yes, I will at least put a stick-on passive heatsink on mine.
I hope not, and then if I'm right and the GPU is more powerful than the Raspberry 4 one this board will run at 6W or something and then a stick-on heatsink wont do it...
Look at my link to the full copper one if I'm right:
http://www.enzotech.com/cnb_s1l.htm
I received it now and it's great (if it fits) well worth the expensive price!
What I gather from the text is that it's a calculated (from design libraries), rather than measured, full load power draw. Which would make these numbers the upper bound, and thus very good.
I might be wrong.
Either way, as these boards are reaching people, it shouldn't take long until we see measured power draw and temperatures.
This is why so much hardware ends up in landfills. No thanks to undocumented junk.
https://www.sifive.com/cores/u74-mc
Unfortunately there appears to be no detailed documentation at all (unless you count a pile of Linux and bootloader patches, which I don't) for the peripherals, etc, outside of the core complex on the SoC:
This is what drives me crazy. Vendor claims "open source" which means an outdated linux image and the source code is wrapped up inside of a megalith build monstrosity like penguintronix or yocto. Utter junk these things are.
It is not anywhere as bad as you're picturing it.
It is If I want to bootstrap a kernel that isn't Linux.
Curious: Is there a "Ferrari" general RISC-V ISA shorthand or CPU implementation with more extensions including Q B V K H & S ?
- Yocto Linux BSP
- Buildroot Linux BSP
- Embedded Linux from Siemens Embedded
- FreeBSD (coming soon)
https://www.microchip.com/en-us/products/fpgas-and-plds/syst...
I've looked at the board, and don't see the appeal in price, for only mediocre CPU-parts, not enough RAM, altough good enough I/O-options. Makes no sense if you don't want to meddle with FPGAs, and just look for a fast SBC with Risc-V.
To me, at least.
Freebsd boots, but that's it.
Of course, as this board is the first large production run, decent spec'd and reasonably compliant <$100 RISC-V SBC, this is expected to improve quickly as they reach developers and quickstart the ecosystem. That's the true intent of this board.
This is an order of magnitude more boards than accumulated RISC-V development boards distributed to date.
My answer was, however, specific to systems that run on VisionFive 2.
The situation should improve dramatically once proper documentation is available.
As RVA22 is not done (although almost there), we can't know whether it's compliant, but we will once it is. Expectation is yes.
Otherwise, most stuff out there will be RVA20 compliant once that's ratified, as that reflects what was already common back in chips designed in 2020, what most have been calling RV64GC.
These are documented.
But that design is configurable. We know B extension (optional) is enabled. I have no idea about every other setting this core can be synthesized with.
It just doesn't claim to have B (the whole package).
Zba ("and-not" etc.) and Zbs (single-bit) are more obscure and less important. Zbc (carry-less multiply) is interesting.
Can you do regular Linux without S?
If your only sell is open hardware, I'm going to wait until the hardware is open to waste my time with it.