At the edges of Moore’s Law, connecting components is increasingly the game | Hacker News Reader

At the edges of Moore’s Law, connecting components is increasingly the game

spectrum.ieee.org

57 pointsAmorymeltzer10 comments

Fun fact: you may know silver (followed by copper) is the metal with the highest electrical conductivity at room temperature, but this is only true in bulk.

When a piece of metal is thinner than 100nm or so, its conductivity increases basically due to electrons hitting the sides. At these thicknesses, obscure metals like ruthenium, rhodium, and iridium can sometimes have higher conductivity than copper and silver. [1]

[1] https://doi.org/10.1063/1.5133671

This may be one of those corner cases where something that seems like either bunk or science fiction might show up, I give you, the Ultraconductor[1] a one dimensional conductor with 10^6 times the conductivity of silver.(If it isn't a scam, of course)

[1] http://www.superconductors.org/ultra.htm

Looks like the author's company failed, but he's back working on similar technology? See https://www.linkedin.com/in/kevin-shambrook-a4884a4/.

> the spaces between slender ruthenium lines can easily be filled with air, which is the best insulator available.

This surprised me. With the extremes that chip manufacturers already go to, I would have thought that filling the chip with a vacuum would be relatively straightforward. I thought that a vacuum would be an even better insulator?

Happy to be told why I'm wrong here, perhaps the benefits are not as great as I think or maybe it is not possible to maintain the vacuum over the expected lifetime of the chip?

> the benefits are not as great as I think

It's this one.

You're probably thinking of an electrical insulator solely as a material with low conductivity. Vacuum, air, glass (SiO2) (which is the default insulator in chip manufacturing), and many other insulators all have such negligibly small conductivity it doesn't matter here.

But all insulators have a second relevant property: their permittivity (quantified by a number called the material's "dielectric constant". When this is relevant, people often call the insulator a "dielectric"). When an insulator is between two conductors at different voltages, it forms a capacitor. In wiring this is typically undesired because the capacitor takes energy whenever the conductor voltages change.

In fact, the capacitance of the gate insulator in transistors is what causes most heat dissipation in CPUs! (Which, of course, is a big limit to scaling transistor density right now.) Unfortunately, this is fundamental to how transistors work.

Anyway, for wiring you want the capacitance formed by the insulator to be as small as possible, which you do by choosing a material with the smallest dielectric constant. The dielectric constant of SiO2 glass is about 4 times greater than both air and vacuum, which are about equally good.

But keeping a vacuum in a sealed area on a chip is occasionally used for MEMS devices like accelerometers, gyroscopes, and resonators, which would be slowed down mechanically by air pressure.

Even those MEMS devices (like sealed poly and Bosch etched bulk resonators) don't use a full vacuum. It's inconvenient and difficult to control. Instead a controlled amount of non-reactive gas is included to give repeatable results (eg damping). Having a known dielectric even close to 1 is fine and atmospheric pressure effects are negligible (eg <0.1%).

In the case of electrical interconnects I'd be surprised, if they weren't sealed with an atmospheric pressure inert gas (N2, CO2, Ar) just to keep moisture out or at least drying agent. Moisture (and dog forbid, condensation) is more likely to cause catastrophic effects than dry air. You could easily go from 1.0005 to 10... and that's ignoring conductivity and dielectric loss.

To be clear, you want to decrease the permittivity that adds capacitance where the accumulation of charge serves no purpose (i.e., in the interconnects) and increase permittivity where we want to have a lot of charge (i.e., on the actual transistor gates so we can produce a large enough electric field to switch the transistor), which is why gate dielectrics use high-k materials like HfO2 and interconnect layers use low-k dielectrics like carbon-doped oxides.)

The thing about gates is that leakage is an issue, so Intel went to great lengths to increase the permittivity of (aka K) of their transistor gates[1] using Hafnium and other Oxides.

[1] https://www.intel.com/pressroom/kits/advancedtech/doodle/ref...

Is it ironic that the article is about replacing copper with a new metal, and they quote an IEEE IBM person named Chris Penny?

Too perfect, I love it.

I'm curious as to how the inclusion of air gaps will affect the thermal stress characteristics of the chip -- adding another thermal expansion coefficient to the mix seems like a headache?

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