Lattice Avant Launch Event, 5th December

Lattice Avant low-power FPGA with up to 500k logic elements, much more, yadda, yadda.

Held in the Computer History Museum in Mountain View, CA.

About 45 min.

Edit: Where went the link?!

https://www.youtube.com/watch?v=YfBq9HAXIGk

Edit:

· Switching fabric built of 4-input LUTs @16nm TSMC

· 10 µW per logic cell when running at 350mHz

· Besides many 25Gb SERDES, also 'dedicated' PCI-E 4x8

· Memory interface for (LP)DDR4&5

· If needed even 3,3V IO