If its from IBM Telum processors, this is the weird processor where a processor's L2 cache serves as the L3 and L4 caches of other processors. The processors network with each other, notice when they're not using all of their caches, and shares that cache with things far away (ie: in side the box, or even outside the box).

This way, IBM can overprovision L2 cache and "not worry" about it going unused. Remote L2 cache is slower than local L2 cache, but its still SRAM and should still be faster than DRAM to access.