Now any high performance stack machine is likely to decompose stack code to register renaming and micro-ops so some of that stuff is going to happen anyway (as it would in a register machine) and some stack ops (like dup) are going to disappear into the renamer (but then a compiler would do that as a CSE on a register machine)
Unfortunately you can't program it either in C or in Verilog, and it doesn't have multipliers, so it hasn't seen significant adoption. But its problem is that it's hard to program, not that its performance is poor.
You might be able to compile a C program to a floorplan of processors passing messages to one another, but it would be similar to writing a SystemC compiler which compiles C to, ultimately, a circuit netlist. The impedance mismatch is severe.