AMD’s Zen 4 Part 1: Front End and Execution Engine

Agreed. This is very fascinating stuff to help understand what's really happening at that low level in these new chips and how this can impact software performance, the intricate details of which are sometimes only sparsely available online and usually not as approachable.

They also had an excellent one posted just a few weeks ago on the Intel Skylake architecture in case you hadn't yet seen it: https://chipsandcheese.com/2022/10/14/skylake-intels-longest...

And this is just Part 1

A decade plus ago, the deep details were much better reported. Every little cache change, pipeline tweak was known & reported. Sites like Real World Tech with Kanter would go even deeper to find every little nuance & difference they could. We used to be into details, super hard.

Things have just broadly gotten much stupider, much more generic. Reporting has gotten superficial. Chips & cheese makes it feel like 1999 again. Back when people bothered to know & care & follow the advance.

This is the kind of stuff I liked in magazines such as BYTE. So dearly missed...

No, the amount of conditional logic in code is more or less the same. But memory is as slow as ever relative to the CPU, which means the CPU wants to start reading in the instructions it will need as soon as possible. Without good branch prediction, the CPU would spend too much time waiting for memory to give it more instructions after a branch.

Modern CPUs also don't execute one instruction at a time, they have a long and complex pipeline that they want to keep full to maximize the amount of work per clock tick. If a branch prediction fails, a lot of work in the pipeline will need to be discarded.

Branch predictors also require balancing a lot of trade-offs in the silicon, so their design has evolved considerably over the years.

More in-depth info about branch prediction can be found here: https://danluu.com/branch-prediction/